ADDHNB

Add narrow high part (bottom)

This instruction adds each vector element of the first source vector to the corresponding vector element of the second source vector, and places the most significant half of the result in the even-numbered half-width destination elements, while setting the odd-numbered elements to zero. This instruction is unpredicated.

SVE2
(FEAT_SVE2 || FEAT_SME)

313029282726252423222120191817161514131211109876543210
01000101size1Zm011000ZnZd
SRT

Encoding

ADDHNB <Zd>.<T>, <Zn>.<Tb>, <Zm>.<Tb>

Decode for this encoding

if !IsFeatureImplemented(FEAT_SVE2) && !IsFeatureImplemented(FEAT_SME) then EndOfDecode(Decode_UNDEF); end; if size == '00' then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 8 << UInt(size); let n : integer = UInt(Zn); let m : integer = UInt(Zm); let d : integer = UInt(Zd);

Assembler Symbols

<Zd>

Is the name of the destination scalable vector register, encoded in the "Zd" field.

<T>

Is the size specifier, encoded in size:

size <T>
00 RESERVED
01 B
10 H
11 S
<Zn>

Is the name of the first source scalable vector register, encoded in the "Zn" field.

<Tb>

Is the size specifier, encoded in size:

size <Tb>
00 RESERVED
01 H
10 S
11 D
<Zm>

Is the name of the second source scalable vector register, encoded in the "Zm" field.

Operation

CheckSVEEnabled(); let VL : integer{} = CurrentVL(); let elements : integer = VL DIV esize; let operand1 : bits(VL) = Z{}(n); let operand2 : bits(VL) = Z{}(m); var result : bits(VL); let halfesize : integer{} = esize DIV 2; for e = 0 to elements-1 do let element1 : integer = UInt(operand1[e*:esize]); let element2 : integer = UInt(operand2[e*:esize]); let res : integer = (element1 + element2) >> halfesize; result[(2*e + 0)*:halfesize] = res[halfesize-1:0]; result[(2*e + 1)*:halfesize] = Zeros{halfesize}; end; Z{VL}(d) = result;

Operational information

This instruction is a data-independent-time instruction as described in About PSTATE.DIT.


2026-03_rel 2026-03-26 20:48:11

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