ADDPL

Add multiple of predicate register size to scalar register

This instruction adds the current predicate register size in bytes multiplied by an immediate in the range -32 to 31 to the 64-bit source general-purpose register or current stack pointer and places the result in the 64-bit destination general-purpose register or current stack pointer.

SVE
(FEAT_SVE || FEAT_SME)

313029282726252423222120191817161514131211109876543210
00000100011Rn01010imm6Rd
op

Encoding

ADDPL <Xd|SP>, <Xn|SP>, #<imm>

Decode for this encoding

if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then EndOfDecode(Decode_UNDEF); end; let n : integer = UInt(Rn); let d : integer = UInt(Rd); let imm : integer = SInt(imm6);

Assembler Symbols

<Xd|SP>

Is the 64-bit name of the destination general-purpose register or stack pointer, encoded in the "Rd" field.

<Xn|SP>

Is the 64-bit name of the source general-purpose register or stack pointer, encoded in the "Rn" field.

<imm>

Is the signed immediate operand, in the range -32 to 31, encoded in the "imm6" field.

Operation

CheckSVEEnabled(); let VL : integer{} = CurrentVL(); let PL : integer{} = VL DIV 8; let operand1 : bits(64) = if n == 31 then SP{64}() else X{64}(n); let result : bits(64) = operand1 + (imm * (PL DIV 8)); if d == 31 then SP{64}() = result; else X{64}(d) = result; end;

Operational information

This instruction is a data-independent-time instruction as described in About PSTATE.DIT.


2026-03_rel 2026-03-26 20:48:11

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