Multi-vector BFloat16 dot product by vector to single-precision
This instruction calculates the dot product of a pair of BF16 values held in the corresponding 32-bit elements of the two or four first source vectors and the second source vector. The single-precision dot product results are destructively added to the corresponding single-precision elements of the ZA single-vector groups.
The single-vector group within each half of or each quarter of the ZA array is selected by the sum of the vector select register and offset, modulo half or quarter the number of ZA array vectors.
The vector group symbol, VGx2 or VGx4, indicates that the ZA operand consists of two or four ZA single-vector groups respectively. The vector group symbol is preferred for disassembly, but optional in assembler source code.
This instruction follows SME2 ZA-targeting BFloat16 numerical behaviors.
This instruction is unpredicated.
It has encodings from 2 classes: Two ZA single-vectors and Four ZA single-vectors
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | Zm | 0 | Rv | 1 | 0 | 0 | Zn | 1 | 0 | off3 | ||||||||||
| opc | |||||||||||||||||||||||||||||||
if !IsFeatureImplemented(FEAT_SME2) then EndOfDecode(Decode_UNDEF); end; let v : integer = UInt('010'::Rv); let n : integer = UInt(Zn); let m : integer = UInt('0'::Zm); let offset : integer = UInt(off3); let nreg : integer{} = 2;
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | Zm | 0 | Rv | 1 | 0 | 0 | Zn | 1 | 0 | off3 | ||||||||||
| opc | |||||||||||||||||||||||||||||||
if !IsFeatureImplemented(FEAT_SME2) then EndOfDecode(Decode_UNDEF); end; let v : integer = UInt('010'::Rv); let n : integer = UInt(Zn); let m : integer = UInt('0'::Zm); let offset : integer = UInt(off3); let nreg : integer{} = 4;
| <Wv> |
Is the 32-bit name of the vector select register W8-W11, encoded in the "Rv" field. |
| <offs> |
Is the vector select offset, in the range 0 to 7, encoded in the "off3" field. |
| <Zn1> |
Is the name of the first scalable vector register of the first source multi-vector group, encoded as "Zn". |
| <Zn2> |
Is the name of the second scalable vector register of the first source multi-vector group, encoded as "Zn" plus 1 modulo 32. |
| <Zm> |
Is the name of the second source scalable vector register Z0-Z15, encoded in the "Zm" field. |
| <Zn4> |
Is the name of the fourth scalable vector register of the first source multi-vector group, encoded as "Zn" plus 3 modulo 32. |
CheckStreamingSVEAndZAEnabled(); let VL : integer{} = CurrentVL(); let elements : integer = VL DIV 32; let vectors : integer = VL DIV 8; let vstride : integer = vectors DIV nreg; let vbase : bits(32) = X{}(v); var vec : integer = (UInt(vbase) + offset) MOD vstride; var result : bits(VL); for r = 0 to nreg-1 do let operand1 : bits(VL) = Z{}((n+r) MOD 32); let operand2 : bits(VL) = Z{}(m); let operand3 : bits(VL) = ZAvector{}(vec); for e = 0 to elements-1 do let elt1_a : bits(16) = operand1[(2 * e + 0)*:16]; let elt1_b : bits(16) = operand1[(2 * e + 1)*:16]; let elt2_a : bits(16) = operand2[(2 * e + 0)*:16]; let elt2_b : bits(16) = operand2[(2 * e + 1)*:16]; var sum : bits(32) = operand3[e*:32]; sum = BFDotAdd(sum, elt1_a, elt1_b, elt2_a, elt2_b, FPCR()); result[e*:32] = sum; end; ZAvector{VL}(vec) = result; vec = vec + vstride; end;
2026-03_rel 2026-03-26 20:48:11
Copyright © 2010-2026 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.