BFMLA (multiple and indexed vector)

Multi-vector BFloat16 fused multiply-add by indexed element

This instruction multiplies the indexed element of the second source vector by the corresponding BFloat16 elements of the two or four first source vectors and destructively adds these values without intermediate rounding to the corresponding elements of the ZA single-vector groups.

The elements within the second source vector are specified using an immediate element index that selects the same element position within each 128-bit vector segment. The index range is from 0 to 7.

The single-vector group within each half of or each quarter of the ZA array is selected by the sum of the vector select register and offset, modulo half or quarter the number of ZA array vectors.

The vector group symbol, VGx2 or VGx4, indicates that the ZA operand consists of two or four ZA single-vector groups respectively. The vector group symbol is preferred for disassembly, but optional in assembler source code.

This instruction follows SME2 ZA-targeting non-widening BFloat16 numerical behaviors.

This instruction is unpredicated.

ID_AA64SMFR0_EL1.B16B16 indicates whether this instruction is implemented.

It has encodings from 2 classes: Two ZA single-vectors and Four ZA single-vectors

Two ZA single-vectors
(FEAT_SME_B16B16)

Decode for this encoding

if !IsFeatureImplemented(FEAT_SME_B16B16) then EndOfDecode(Decode_UNDEF); end; let v : integer = UInt('010'::Rv); let esize : integer{} = 16; let n : integer = UInt(Zn::'0'); let m : integer = UInt('0'::Zm); let offset : integer = UInt(off3); let index : integer = UInt(i3h::i3l); let nreg : integer{} = 2;

Four ZA single-vectors
(FEAT_SME_B16B16)

Decode for this encoding

if !IsFeatureImplemented(FEAT_SME_B16B16) then EndOfDecode(Decode_UNDEF); end; let v : integer = UInt('010'::Rv); let esize : integer{} = 16; let n : integer = UInt(Zn::'00'); let m : integer = UInt('0'::Zm); let offset : integer = UInt(off3); let index : integer = UInt(i3h::i3l); let nreg : integer{} = 4;