CPY (immediate, zeroing)

Copy signed integer immediate to vector elements (zeroing)

This instruction copies a signed integer immediate to each Active element in the destination vector. Inactive elements in the destination vector register are set to zero.

The immediate operand is a signed value in the range -128 to +127, and for element widths of 16 bits or higher it may also be a signed multiple of 256 in the range -32768 to +32512 (excluding 0).

The immediate is encoded in 8 bits with an optional left shift by 8. The preferred disassembly when the shift option is specified is "#<imm>, LSL #8". However an assembler and disassembler may also allow use of the shifted 16-bit value unless the immediate is 0 and the shift amount is 8, which must be unambiguously described as "#0, LSL #8".

This instruction is used by the alias MOV (immediate, zeroing).

SVE
(FEAT_SVE || FEAT_SME)

313029282726252423222120191817161514131211109876543210
00000101size01Pg00shimm8Zd
M

Encoding

CPY <Zd>.<T>, <Pg>/Z, #<imm>{, <shift>}

Decode for this encoding

if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then EndOfDecode(Decode_UNDEF); end; if size::sh == '001' then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 8 << UInt(size); let g : integer = UInt(Pg); let d : integer = UInt(Zd); let merging : boolean = FALSE; var imm : integer = SInt(imm8); if sh == '1' then imm = imm << 8; end;

Assembler Symbols

<Zd>

Is the name of the destination scalable vector register, encoded in the "Zd" field.

<T>

Is the size specifier, encoded in size:

size <T>
00 B
01 H
10 S
11 D
<Pg>

Is the name of the governing scalable predicate register, encoded in the "Pg" field.

<imm>

Is a signed immediate in the range -128 to 127, encoded in the "imm8" field.

<shift>

Is the optional left shift to apply to the immediate, defaulting to LSL #0 and encoded in sh:

sh <shift>
0 LSL #0
1 LSL #8

Operation

CheckSVEEnabled(); let VL : integer{} = CurrentVL(); let PL : integer{} = VL DIV 8; let elements : integer = VL DIV esize; let mask : bits(PL) = P{}(g); let dest : bits(VL) = if merging then Z{VL}(d) else Zeros{VL}; var result : bits(VL); for e = 0 to elements-1 do if ActivePredicateElement{PL}(mask, e, esize) then result[e*:esize] = imm[esize-1:0]; else result[e*:esize] = dest[e*:esize]; end; end; Z{VL}(d) = result;


2026-03_rel 2026-03-26 20:48:11

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