CTERMEQ, CTERMNE

Compare and terminate loop

This instruction detects termination conditions in serialized vector loops by testing whether the comparison between the scalar source operands holds true. If the comparison is not successful, the instruction tests the state of the !Last condition flag (C), which indicates whether the previous flag-setting predicate instruction selected the last element of the vector partition.

The Z and C condition flags are preserved by this instruction. The N and V condition flags are set as a pair to generate one of the following conditions for a subsequent conditional instruction:

Condition N V Meaning
GE 0 0 Continue loop (compare failed and last element not selected)
LT 0 1 Terminate loop (last element selected)
LT 1 0 Terminate loop (compare succeeded)
GE 1 1 Never generated

The scalar source operands are 32-bit or 64-bit general-purpose registers of the same size.

It has encodings from 2 classes: Equal and Not equal

Equal
(FEAT_SVE || FEAT_SME)

313029282726252423222120191817161514131211109876543210
001001011sz1Rm001000Rn00000
opne

Encoding

CTERMEQ <R><n>, <R><m>

Decode for this encoding

if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 32 << UInt(sz); let n : integer = UInt(Rn); let m : integer = UInt(Rm); let cmp_op : CmpOp = Cmp_EQ;

Not equal
(FEAT_SVE || FEAT_SME)

313029282726252423222120191817161514131211109876543210
001001011sz1Rm001000Rn10000
opne

Encoding

CTERMNE <R><n>, <R><m>

Decode for this encoding

if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 32 << UInt(sz); let n : integer = UInt(Rn); let m : integer = UInt(Rm); let cmp_op : CmpOp = Cmp_NE;

Assembler Symbols

<R>

Is a width specifier, encoded in sz:

sz <R>
0 W
1 X
<n>

Is the number [0-30] of the source general-purpose register or the name ZR (31), encoded in the "Rn" field.

<m>

Is the number [0-30] of the source general-purpose register or the name ZR (31), encoded in the "Rm" field.

Operation

CheckSVEEnabled(); let operand1 : bits(esize) = X{}(n); let operand2 : bits(esize) = X{}(m); let element1 : integer = UInt(operand1); let element2 : integer = UInt(operand2); var term : boolean; case cmp_op of when Cmp_EQ => term = element1 == element2; when Cmp_NE => term = element1 != element2; end; if term then PSTATE.N = '1'; PSTATE.V = '0'; else PSTATE.N = '0'; PSTATE.V = (NOT PSTATE.C); end;

Operational information

This instruction is a data-independent-time instruction as described in About PSTATE.DIT.


2026-03_rel 2026-03-26 20:48:11

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