DUPQ

Broadcast indexed element within each quadword vector segment (unpredicated)

This instruction unconditionally broadcasts the indexed element within each 128-bit source vector segment to all elements of the corresponding destination vector segment. This instruction is unpredicated.

The immediate element index is in the range of 0 to 15 (bytes), 7 (halfwords), 3 (words) or 1 (doublewords).

SVE2
(FEAT_SVE2p1 || FEAT_SME2p1)

313029282726252423222120191817161514131211109876543210
00000101001i1tsz001001ZnZd

Encoding

DUPQ <Zd>.<T>, <Zn>.<T>[<imm>]

Decode for this encoding

if !IsFeatureImplemented(FEAT_SVE2p1) && !IsFeatureImplemented(FEAT_SME2p1) then EndOfDecode(Decode_UNDEF); end; if tsz == '0000' then EndOfDecode(Decode_UNDEF); end; let lsb : integer{} = LowestSetBit(tsz); let esize : integer{} = 8 << lsb; let imm : bits(5) = i1::tsz; let index : integer = UInt(imm[4:(lsb+1)]); let n : integer = UInt(Zn); let d : integer = UInt(Zd);

Assembler Symbols

<Zd>

Is the name of the destination scalable vector register, encoded in the "Zd" field.

<T>

Is the size specifier, encoded in tsz:

tsz <T>
0000 RESERVED
xxx1 B
xx10 H
x100 S
1000 D
<Zn>

Is the name of the source scalable vector register, encoded in the "Zn" field.

<imm>

Is the immediate index, in the range 0 to one less than the number of elements in 128 bits, encoded in "i1:tsz".

Operation

CheckSVEEnabled(); let VL : integer{} = CurrentVL(); let segments : integer = VL DIV 128; let elements : integer = 128 DIV esize; let operand : bits(VL) = Z{}(n); var result : bits(VL); var element : bits(esize); for s = 0 to segments-1 do element = operand[(s * elements + index)*:esize]; result[s*:128] = Replicate{128}(element); end; Z{VL}(d) = result;

Operational information

This instruction is a data-independent-time instruction as described in About PSTATE.DIT.


2026-03_rel 2026-03-26 20:48:11

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