FAMAX

Floating-point absolute maximum

This instruction determines the maximum absolute value from floating-point elements of the first source vector and the corresponding floating-point elements of the second source vector, and places the results in the corresponding elements of the destination vector.

Regardless of the value of FPCR.AH, the behavior is as follows:

It has encodings from 2 classes: Half-precision and Single-precision and double-precision

Half-precision
(FEAT_AdvSIMD && FEAT_FAMINMAX)

313029282726252423222120191817161514131211109876543210
0Q001110110Rm000111RnRd
Uaopcode

Encoding

FAMAX <Vd>.<T>, <Vn>.<T>, <Vm>.<T>

Decode for this encoding

if !IsFeatureImplemented(FEAT_AdvSIMD) || !IsFeatureImplemented(FEAT_FAMINMAX) then EndOfDecode(Decode_UNDEF); end; let d : integer{} = UInt(Rd); let n : integer{} = UInt(Rn); let m : integer{} = UInt(Rm); let esize : integer{} = 16; let datasize : integer{} = if Q == '1' then 128 else 64; let elements : integer = datasize DIV esize;

Single-precision and double-precision
(FEAT_AdvSIMD && FEAT_FAMINMAX)

313029282726252423222120191817161514131211109876543210
0Q0011101x1Rm110111RnRd
Usizeopcode

Encoding

FAMAX <Vd>.<T>, <Vn>.<T>, <Vm>.<T>

Decode for this encoding

if !IsFeatureImplemented(FEAT_AdvSIMD) || !IsFeatureImplemented(FEAT_FAMINMAX) then EndOfDecode(Decode_UNDEF); end; if Q == '0' && size == '11' then EndOfDecode(Decode_UNDEF); end; let d : integer{} = UInt(Rd); let n : integer{} = UInt(Rn); let m : integer{} = UInt(Rm); let esize : integer{} = 8 << UInt(size); let datasize : integer{} = if Q == '1' then 128 else 64; let elements : integer = datasize DIV esize;

Assembler Symbols

<Vd>

Is the name of the SIMD&FP destination register, encoded in the "Rd" field.

<T>

For the "Half-precision" variant: is an arrangement specifier, encoded in Q:

Q <T>
0 4H
1 8H

For the "Single-precision and double-precision" variant: is an arrangement specifier, encoded in (size[0] :: Q):

size[0] Q <T>
0 0 2S
0 1 4S
1 0 RESERVED
1 1 2D
<Vn>

Is the name of the first SIMD&FP source register, encoded in the "Rn" field.

<Vm>

Is the name of the second SIMD&FP source register, encoded in the "Rm" field.

Operation

AArch64_CheckFPAdvSIMDEnabled(); let operand1 : bits(datasize) = V{}(n); let operand2 : bits(datasize) = V{}(m); var result : bits(datasize); for e = 0 to elements-1 do let op1 : bits(esize) = operand1[e*:esize]; let op2 : bits(esize) = operand2[e*:esize]; result[e*:esize] = FPAbsMax{esize}(op1, op2, FPCR()); end; V{datasize}(d) = result;


2026-03_rel 2026-03-26 20:48:11

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