Multi-vector half-precision convert to deinterleaved single-precision
This instruction converts each element of the source vector from half-precision to single-precision floating-point, and places the two-way deinterleaved results in the double-width destination elements of the destination vectors.
This instruction follows SME2 floating-point numerical behaviors corresponding to instructions that place their results in one or more SVE Z vectors.
This instruction is unpredicated.
ID_AA64SMFR0_EL1.F16F16 indicates whether this instruction is implemented.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | Zn | Zd | 1 | |||||||
| L | |||||||||||||||||||||||||||||||
if !IsFeatureImplemented(FEAT_SME_F16F16) then EndOfDecode(Decode_UNDEF); end; let n : integer = UInt(Zn); let d : integer = UInt(Zd::'0');
| <Zd1> |
Is the name of the first scalable vector register of the destination multi-vector group, encoded as "Zd" times 2. |
| <Zd2> |
Is the name of the second scalable vector register of the destination multi-vector group, encoded as "Zd" times 2 plus 1. |
| <Zn> |
Is the name of the source scalable vector register, encoded in the "Zn" field. |
CheckStreamingSVEEnabled(); let VL : integer{} = CurrentVL(); let pairs : integer = VL DIV 32; let operand : bits(VL) = Z{}(n); var result0 : bits(VL); var result1 : bits(VL); for p = 0 to pairs-1 do let element1 : bits(16) = operand[(2*p+0)*:16]; let element2 : bits(16) = operand[(2*p+1)*:16]; let res1 : bits(32) = FPConvertSVE{32, 16}(element1, FPCR()); let res2 : bits(32) = FPConvertSVE{32, 16}(element2, FPCR()); result0[p*:32] = res1; result1[p*:32] = res2; end; Z{VL}(d+0) = result0; Z{VL}(d+1) = result1;
2026-03_rel 2026-03-26 20:48:11
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