Floating-point maximum reduction of quadword vector segments
This instruction calculates a floating-point maximum of the same element numbers from each 128-bit source vector segment using a recursive pairwise reduction, and places each result into the corresponding element number of the 128-bit SIMD&FP destination register. Inactive elements in the source vector are treated as -Infinity.
When FPCR.AH is 0, the behavior is as follows:
When FPCR.AH is 1, the behavior is as follows:
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | 0 | size | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | Pg | Zn | Vd | |||||||||||
| opc | |||||||||||||||||||||||||||||||
if !IsFeatureImplemented(FEAT_SVE2p1) && !IsFeatureImplemented(FEAT_SME2p1) then EndOfDecode(Decode_UNDEF); end; if size == '00' then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 8 << UInt(size); let g : integer = UInt(Pg); let n : integer = UInt(Zn); let d : integer = UInt(Vd);
| <Vd> |
Is the name of the destination SIMD&FP register, encoded in the "Vd" field. |
| <T> |
Is an arrangement specifier,
encoded in
|
| <Pg> |
Is the name of the governing scalable predicate register P0-P7, encoded in the "Pg" field. |
| <Zn> |
Is the name of the source scalable vector register, encoded in the "Zn" field. |
| <Tb> |
Is the size specifier,
encoded in
|
CheckSVEEnabled(); let VL : integer{} = CurrentVL(); let PL : integer{} = VL DIV 8; let segments : integer{} = VL DIV 128; let elempersegment : integer = 128 DIV esize; let segbits : integer{} = segments*esize; let mask : bits(PL) = P{}(g); let operand : bits(VL) = if AnyActiveElement{PL}(mask, esize) then Z{VL}(n) else Zeros{VL}; let identity : bits(esize) = FPInfinity{esize}('1'); var result : bits(128) = Zeros{}; for e = 0 to elempersegment-1 do var stmp : bits(segbits); for s = 0 to segments-1 do if ActivePredicateElement{PL}(mask, s * elempersegment + e, esize) then stmp[s*:esize] = operand[(s * elempersegment + e)*:esize]; else stmp[s*:esize] = identity; end; end; result[e*:esize] = FPReduce{esize, segbits}(ReduceOp_FMAX, stmp, FPCR()); end; V{128}(d) = result;
2026-03_rel 2026-03-26 20:48:11
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