FMOPA (non-widening)

Floating-point outer product, accumulating

The half-precision variant works with a 16-bit element ZA tile.

The single-precision variant works with a 32-bit element ZA tile.

The double-precision variant works with a 64-bit element ZA tile.

This instruction generates an outer product of the first source vector and the second source vector. In case of the half-precision variant, the first source is SVLH×1 vector and the second source is 1×SVLH vector. In case of the single-precision variant, the first source is SVLS×1 vector and the second source is 1×SVLS vector. In case of the double-precision variant, the first source is SVLD×1 vector and the second source is 1×SVLD vector.

Each source vector is independently predicated by a corresponding governing predicate. When either source vector element is Inactive the corresponding destination tile element remains unmodified.

The resulting outer product, SVLH×SVLH in case of half-precision variant, SVLS×SVLS in case of single-precision variant or SVLD×SVLD in case of double-precision variant, is then destructively added to the destination tile. This is equivalent to performing a single multiply-accumulate to each of the destination tile elements.

This instruction follows SME ZA-targeting floating-point behaviors.

ID_AA64SMFR0_EL1.F64F64 indicates whether the double-precision variant is implemented, and ID_AA64SMFR0_EL1.F16F16 indicates whether the half-precision variant is implemented.

It has encodings from 3 classes: Half-precision , Single-precision and Double-precision

Half-precision
(FEAT_SME_F16F16)

313029282726252423222120191817161514131211109876543210
10000001100ZmPmPnZn0100ZAda
S

Encoding

FMOPA <ZAda>.H, <Pn>/M, <Pm>/M, <Zn>.H, <Zm>.H

Decode for this encoding

if !IsFeatureImplemented(FEAT_SME_F16F16) then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 16; let a : integer = UInt(Pn); let b : integer = UInt(Pm); let n : integer = UInt(Zn); let m : integer = UInt(Zm); let da : integer = UInt(ZAda);

Single-precision
(FEAT_SME)

313029282726252423222120191817161514131211109876543210
10000000100ZmPmPnZn000ZAda
S

Encoding

FMOPA <ZAda>.S, <Pn>/M, <Pm>/M, <Zn>.S, <Zm>.S

Decode for this encoding

if !IsFeatureImplemented(FEAT_SME) then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 32; let a : integer = UInt(Pn); let b : integer = UInt(Pm); let n : integer = UInt(Zn); let m : integer = UInt(Zm); let da : integer = UInt(ZAda);

Double-precision
(FEAT_SME_F64F64)

313029282726252423222120191817161514131211109876543210
10000000110ZmPmPnZn00ZAda
S

Encoding

FMOPA <ZAda>.D, <Pn>/M, <Pm>/M, <Zn>.D, <Zm>.D

Decode for this encoding

if !IsFeatureImplemented(FEAT_SME_F64F64) then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 64; let a : integer = UInt(Pn); let b : integer = UInt(Pm); let n : integer = UInt(Zn); let m : integer = UInt(Zm); let da : integer = UInt(ZAda);

Assembler Symbols

<ZAda>

For the "Half-precision" variant: is the name of the ZA tile ZA0-ZA1, encoded in the "ZAda" field.

For the "Single-precision" variant: is the name of the ZA tile ZA0-ZA3, encoded in the "ZAda" field.

For the "Double-precision" variant: is the name of the ZA tile ZA0-ZA7, encoded in the "ZAda" field.

<Pn>

Is the name of the first governing scalable predicate register P0-P7, encoded in the "Pn" field.

<Pm>

Is the name of the second governing scalable predicate register P0-P7, encoded in the "Pm" field.

<Zn>

Is the name of the first source scalable vector register, encoded in the "Zn" field.

<Zm>

Is the name of the second source scalable vector register, encoded in the "Zm" field.

Operation

CheckStreamingSVEAndZAEnabled(); let VL : integer{} = CurrentVL(); let PL : integer{} = VL DIV 8; let dim : integer{} = VL DIV esize; let mask1 : bits(PL) = P{}(a); let mask2 : bits(PL) = P{}(b); let op1 : bits(VL) = Z{}(n); let op2 : bits(VL) = Z{}(m); let op3 : bits(dim*dim*esize) = ZAtile{}(da, esize); var result : bits(dim*dim*esize); for row = 0 to dim-1 do for col = 0 to dim-1 do let elem2 : bits(esize) = op2[col*:esize]; let elem3 : bits(esize) = op3[(row*dim+col)*:esize]; if (ActivePredicateElement{PL}(mask1, row, esize) && ActivePredicateElement{PL}(mask2, col, esize)) then let elem1 : bits(esize) = op1[row*:esize]; result[(row*dim+col)*:esize] = FPMulAdd_ZA{esize}(elem3, elem1, elem2, FPCR()); else result[(row*dim+col)*:esize] = elem3; end; end; end; ZAtile{dim*dim*esize}(da, esize) = result;


2026-03_rel 2026-03-26 20:48:11

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