Guarded Control Stack pop
This instruction loads the 64-bit doubleword that is pointed to by the current GCS pointer register, writes it to the destination register, and increments the current GCS pointer register by the size of a GCS procedure return record.
For more information, see GCSPOPM, Guarded Control Stack Pop.
This is an alias of SYSL. This means:
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 1 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | Rt | ||||
| L | op1 | CRn | CRm | op2 | |||||||||||||||||||||||||||
| <Xt> |
Is the 64-bit name of the optional general-purpose destination register, encoded in the "Rt" field. Defaults to XZR if absent. |
The description of SYSL gives the operational pseudocode for this instruction.
2026-03_rel 2026-03-26 20:48:11
Copyright © 2010-2026 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.