Gather load signed words to vector (immediate index)
This instruction performs a gather load of signed words to Active elements of a vector register from memory addresses generated by a vector base plus immediate index. The index is a multiple of 4 in the range 0 to 124. Inactive elements will not cause a read from Device memory or signal faults, and are set to zero in the destination vector.
This instruction is illegal when executed in Streaming SVE mode, unless FEAT_SME_FA64 is implemented and enabled.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 1 | 1 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 1 | imm5 | 1 | 0 | 0 | Pg | Zn | Zt | ||||||||||||||
| msz | U | ff | |||||||||||||||||||||||||||||
if !IsFeatureImplemented(FEAT_SVE) then EndOfDecode(Decode_UNDEF); end; let t : integer = UInt(Zt); let n : integer = UInt(Zn); let g : integer = UInt(Pg); let esize : integer{} = 64; let msize : integer{} = 32; let unsigned : boolean = FALSE; let offset : integer = UInt(imm5);
| <Zt> |
Is the name of the scalable vector register to be transferred, encoded in the "Zt" field. |
| <Pg> |
Is the name of the governing scalable predicate register P0-P7, encoded in the "Pg" field. |
| <Zn> |
Is the name of the base scalable vector register, encoded in the "Zn" field. |
| <imm> |
Is the optional unsigned immediate byte offset, a multiple of 4 in the range 0 to 124, defaulting to 0, encoded in the "imm5" field. |
CheckNonStreamingSVEEnabled(); let VL : integer{} = CurrentVL(); let PL : integer{} = VL DIV 8; let elements : integer = VL DIV esize; let mask : bits(PL) = P{}(g); var base : bits(VL); var result : bits(VL); var data : bits(msize); let mbytes : integer{} = msize DIV 8; let contiguous : boolean = FALSE; let nontemporal : boolean = FALSE; let predicated : boolean = TRUE; let tagchecked : boolean = TRUE; let accdesc : AccessDescriptor = CreateAccDescSVE(MemOp_LOAD, nontemporal, contiguous, predicated, tagchecked); if AnyActiveElement{PL}(mask, esize) then base = Z{VL}(n); end; for e = 0 to elements-1 do if ActivePredicateElement{PL}(mask, e, esize) then let baddr : bits(64) = ZeroExtend{}(base[e*:esize]); let addr : bits(64) = AddressAdd(baddr, offset * mbytes, accdesc); data = Mem{msize}(addr, accdesc); result[e*:esize] = Extend{esize}(data, unsigned); else result[e*:esize] = Zeros{esize}; end; end; Z{VL}(t) = result;
This instruction is a data-independent-time instruction as described in About PSTATE.DIT.
2026-03_rel 2026-03-26 20:48:11
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