Load register byte (register)
This instruction calculates an address from a base register value and an offset register value, loads a byte from memory, zero-extends it, and writes it to a register. For information about addressing modes, see Load/Store addressing modes.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | Rm | option | S | 1 | 0 | Rn | Rt | ||||||||||||||
| size | VR | opc | |||||||||||||||||||||||||||||
if option[1] == '0' then EndOfDecode(Decode_UNDEF); end; // sub-word index let extend_type : ExtendType = DecodeRegExtend(option); let shift : integer{} = 0;
| <Wt> |
Is the 32-bit name of the general-purpose register to be transferred, encoded in the "Rt" field. |
| <Xn|SP> |
Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field. |
| <Wm> |
When option<0> is set to 0, is the 32-bit name of the general-purpose index register, encoded in the "Rm" field. |
| <Xm> |
When option<0> is set to 1, is the 64-bit name of the general-purpose index register, encoded in the "Rm" field. |
| <extend> |
Is the index extend specifier,
encoded in
|
| <amount> |
Is the index shift amount, it must be #0, encoded in "S" as 0 if omitted, or as 1 if present. |
let t : integer{} = UInt(Rt); let n : integer{} = UInt(Rn); let m : integer{} = UInt(Rm); let nontemporal : boolean = FALSE; let tagchecked : boolean = TRUE;
let offset : bits(64) = ExtendReg{}(m, extend_type, shift); var address : bits(64); let privileged : boolean = PSTATE.EL != EL0; let accdesc : AccessDescriptor = CreateAccDescGPR(MemOp_LOAD, nontemporal, privileged, tagchecked, t); if n == 31 then CheckSPAlignment(); address = SP{64}(); else address = X{64}(n); end; address = AddressAdd(address, offset, accdesc); let data : bits(8) = Mem{8}(address, accdesc); X{32}(t) = ZeroExtend{32}(data);
This instruction is a data-independent-time instruction as described in About PSTATE.DIT.
2026-03_rel 2026-03-26 20:48:11
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