Load register signed word (unprivileged)
This instruction loads a word from memory, sign-extends it to 64 bits, and writes the result to a register. The address that is used for the load is calculated from a base register and an immediate offset.
Explicit Memory effects produced by the instruction behave as if the instruction was executed at EL0 if the Effective value of PSTATE.UAO is 0 and either:
Otherwise, the Explicit Memory effects operate with the restrictions determined by the Exception level at which the instruction is executed.
For information about addressing modes, see Load/Store addressing modes.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 1 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | imm9 | 1 | 0 | Rn | Rt | ||||||||||||||||
| size | VR | opc | |||||||||||||||||||||||||||||
let offset : bits(64) = SignExtend{}(imm9);
| <Xt> |
Is the 64-bit name of the general-purpose register to be transferred, encoded in the "Rt" field. |
| <Xn|SP> |
Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field. |
| <simm> |
Is the optional signed immediate byte offset, in the range -256 to 255, defaulting to 0 and encoded in the "imm9" field. |
let t : integer{} = UInt(Rt); let n : integer{} = UInt(Rn); let datasize : integer{} = 32; let nontemporal : boolean = FALSE; let tagchecked : boolean = n != 31;
var address : bits(64); let privileged : boolean = AArch64_IsUnprivAccessPriv(); let accdesc : AccessDescriptor = CreateAccDescGPR(MemOp_LOAD, nontemporal, privileged, tagchecked, t); if n == 31 then CheckSPAlignment(); address = SP{64}(); else address = X{64}(n); end; address = AddressAdd(address, offset, accdesc); let data : bits(datasize) = Mem{datasize}(address, accdesc); X{64}(t) = SignExtend{64}(data);
This instruction is a data-independent-time instruction as described in About PSTATE.DIT.
2026-03_rel 2026-03-26 20:48:11
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