Load SIMD&FP register (unscaled offset)
This instruction loads a SIMD&FP register from memory. The address that is used for the load is calculated from a base register value and an optional immediate offset.
Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| size | 1 | 1 | 1 | 1 | 0 | 0 | x | 1 | 0 | imm9 | 0 | 0 | Rn | Rt | |||||||||||||||||
| VR | opc | ||||||||||||||||||||||||||||||
if !IsFeatureImplemented(FEAT_FP) then EndOfDecode(Decode_UNDEF); end; if opc[1] == '1' && size != '00' then EndOfDecode(Decode_UNDEF); end; let scale : integer{} = if opc[1] == '1' then 4 else UInt(size); let offset : bits(64) = SignExtend{}(imm9);
| <Bt> |
Is the 8-bit name of the SIMD&FP register to be transferred, encoded in the "Rt" field. |
| <Xn|SP> |
Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field. |
| <simm> |
Is the optional signed immediate byte offset, in the range -256 to 255, defaulting to 0 and encoded in the "imm9" field. |
| <Ht> |
Is the 16-bit name of the SIMD&FP register to be transferred, encoded in the "Rt" field. |
| <St> |
Is the 32-bit name of the SIMD&FP register to be transferred, encoded in the "Rt" field. |
| <Dt> |
Is the 64-bit name of the SIMD&FP register to be transferred, encoded in the "Rt" field. |
| <Qt> |
Is the 128-bit name of the SIMD&FP register to be transferred, encoded in the "Rt" field. |
let t : integer{} = UInt(Rt); let n : integer{} = UInt(Rn); let datasize : integer{} = 8 << scale; let nontemporal : boolean = FALSE; let tagchecked : boolean = n != 31;
AArch64_CheckFPEnabled(); var address : bits(64); let privileged : boolean = PSTATE.EL != EL0; let accdesc : AccessDescriptor = CreateAccDescASIMD(MemOp_LOAD, nontemporal, tagchecked, privileged); if n == 31 then CheckSPAlignment(); address = SP{64}(); else address = X{64}(n); end; address = AddressAdd(address, offset, accdesc); V{datasize}(t) = Mem{datasize}(address, accdesc);
This instruction is a data-independent-time instruction as described in About PSTATE.DIT.
2026-03_rel 2026-03-26 20:48:11
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