LDUR

Load register (unscaled)

This instruction calculates an address from a base register and an immediate offset, loads a 32-bit word or 64-bit doubleword from memory, zero-extends it, and writes it to a register. For information about addressing modes, see Load/Store addressing modes.

313029282726252423222120191817161514131211109876543210
1x111000010imm900RnRt
sizeVRopc

Encoding for the 32-bit variant

Applies when (size == 10)

LDUR <Wt>, [<Xn|SP>{, #<simm>}]

Encoding for the 64-bit variant

Applies when (size == 11)

LDUR <Xt>, [<Xn|SP>{, #<simm>}]

Decode for all variants of this encoding

let scale : integer{} = UInt(size); let offset : bits(64) = SignExtend{}(imm9);

Assembler Symbols

<Wt>

Is the 32-bit name of the general-purpose register to be transferred, encoded in the "Rt" field.

<Xn|SP>

Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field.

<simm>

Is the optional signed immediate byte offset, in the range -256 to 255, defaulting to 0 and encoded in the "imm9" field.

<Xt>

Is the 64-bit name of the general-purpose register to be transferred, encoded in the "Rt" field.

Operation

var address : bits(64); let privileged : boolean = PSTATE.EL != EL0; let accdesc : AccessDescriptor = CreateAccDescGPR(MemOp_LOAD, nontemporal, privileged, tagchecked, t); if n == 31 then CheckSPAlignment(); address = SP{64}(); else address = X{64}(n); end; address = AddressAdd(address, offset, accdesc); let data : bits(datasize) = Mem{datasize}(address, accdesc); X{regsize}(t) = ZeroExtend{regsize}(data);

Operational information

This instruction is a data-independent-time instruction as described in About PSTATE.DIT.


2026-03_rel 2026-03-26 20:48:11

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