Lookup table read with 2-bit indices
This instruction copies indexed 8-bit or 16-bit elements from the table vector to the destination vector using packed 2-bit indices from a segment of the source vector. A segment corresponds to a portion of the source vector that is consumed in order to fill the destination vector. The segment is selected by the vector segment index.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | x | 0 | Rm | 0 | len | op | 0 | 0 | Rn | Rd | |||||||||||||
| Q | op2 | ||||||||||||||||||||||||||||||
if !IsFeatureImplemented(FEAT_AdvSIMD) || !IsFeatureImplemented(FEAT_LUT) then EndOfDecode(Decode_UNDEF); end; if op2 == '10' && op == '0' then EndOfDecode(Decode_UNDEF); end; let d : integer{} = UInt(Rd); let n : integer{} = UInt(Rn); let m : integer{} = UInt(Rm); let isize : integer{} = 2; let esize : integer{} = if op2 == '10' then 8 else 16; let part : integer = if op2 == '10' then UInt(len) else UInt(len::op);
| <Vd> |
Is the name of the SIMD&FP destination register, encoded in the "Rd" field. |
| <Vn> |
Is the name of the SIMD&FP table register, encoded in the "Rn" field. |
| <Vm> |
Is the name of the SIMD&FP source register, encoded in the "Rm" field. |
AArch64_CheckFPAdvSIMDEnabled(); let elements : integer = 128 DIV esize; let ibase : integer = elements * part; let indices : bits(128) = V{}(m); let table : bits(128) = V{}(n); var result : bits(128); for e = 0 to elements-1 do let index : integer = UInt(indices[(ibase + e)*:isize]); result[e*:esize] = table[index*:esize]; end; V{128}(d) = result;
This instruction is a data-independent-time instruction as described in About PSTATE.DIT.
2026-03_rel 2026-03-26 20:48:11
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