Lookup table read with 2-bit indexes (two registers)
This instruction copies 8-bit, 16-bit or 32-bit elements from ZT0 to two destination vectors using packed 2-bit indices from a segment of the source vector register. A segment corresponds to a portion of the source vector that is consumed in order to fill the destination vector. The segment is selected by the vector segment index modulo the total number of segments.
This instruction is unpredicated.
It has encodings from 2 classes: Consecutive and Strided
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | i3 | 1 | size | 0 | 0 | Zn | Zd | 0 | ||||||||||
| opc2 | |||||||||||||||||||||||||||||||
if !IsFeatureImplemented(FEAT_SME2) then EndOfDecode(Decode_UNDEF); end; if size == '11' then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 8 << UInt(size); let isize : integer{} = 2; let n : integer = UInt(Zn); let dstride : integer = 1; let d : integer = UInt(Zd::'0'); let imm : integer = UInt(i3); let nreg : integer{} = 2;
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | i3 | 1 | size | 0 | 0 | Zn | D | 0 | Zd | |||||||||
| opc2 | |||||||||||||||||||||||||||||||
if !IsFeatureImplemented(FEAT_SME2p1) then EndOfDecode(Decode_UNDEF); end; if size == '10' || size == '11' then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 8 << UInt(size); let isize : integer{} = 2; let n : integer = UInt(Zn); let dstride : integer = 8; let d : integer = UInt(D::'0'::Zd); let imm : integer = UInt(i3); let nreg : integer{} = 2;
| <Zd2> |
For the "Consecutive" variant: is the name of the second scalable vector register of the destination multi-vector group, encoded as "Zd" times 2 plus 1. |
|
For the "Strided" variant: is the name of the second scalable vector register Z8-Z15 or Z24-Z31 of the destination multi-vector group, encoded as "D:'1':Zd". |
| <Zn> |
Is the name of the source scalable vector register, encoded in the "Zn" field. |
| <index> |
Is the vector segment index, in the range 0 to 7, encoded in the "i3" field. |
CheckStreamingSVEEnabled(); CheckSMEZT0Enabled(); let VL : integer{} = CurrentVL(); let elements : integer = VL DIV esize; let segments : integer = (esize DIV (isize * nreg)) as integer{1, 2, 4, 8, 16}; let segment : integer = imm MOD segments; let indexes : bits(VL) = Z{}(n); var dst : integer = d; let table : bits(512) = ZT0{}(); for r = 0 to nreg-1 do let base : integer = (segment * nreg + r) * elements; var result : bits(VL); for e = 0 to elements-1 do let index : integer = UInt(indexes[(base+e)*:isize]); result[e*:esize] = table[index*:32][esize-1:0]; end; Z{VL}(dst) = result; dst = dst + dstride; end;
This instruction is a data-independent-time instruction as described in About PSTATE.DIT.
2026-03_rel 2026-03-26 20:48:11
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