Move predicate (unpredicated)
This instruction reads all elements from the source predicate and places those elements in the destination predicate. This instruction is unpredicated. This instruction does not set the condition flags.
For programmer convenience, an assembler must also accept predicate-as-counter register names for the source and destination predicate registers.
This is an alias of ORR (predicates). This means:
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 0 | 0 | 0 | Pm | 0 | 1 | Pg | 0 | Pn | 0 | Pd | ||||||||||||
| op | S | o2 | o3 | ||||||||||||||||||||||||||||
is equivalent to
ORR <Pd>.B, <Pn>/Z, <Pn>.B, <Pn>.B
and is the preferred disassembly when S == '0' && Pn == Pm && Pm == Pg.
| <Pd> |
Is the name of the destination scalable predicate register, encoded in the "Pd" field. |
| <Pn> |
Is the name of the source scalable predicate register, encoded in the "Pn" field. |
The description of ORR (predicates) gives the operational pseudocode for this instruction.
The description of ORR (predicates) gives the operational information for this instruction.
2026-03_rel 2026-03-26 20:48:11
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