MOVAZ (tile to vector, four registers) -- A64

This instruction operates on a horizontal or vertical ZA four-slice operand within a ZA tile of the specified element size. The tile slices are zeroed after moving their contents to the destination vectors.

The first slice of the four-slice operand is selected by rounding down the sum of the slice index register and the immediate offset to the nearest lower multiple of 4, modulo the number of slices in the tile.

The immediate offset is a multiple of 4 in the range 0 to the number of elements in a 128-bit vector segment minus 4.

8-bit
(FEAT_SME2p1)

Decode for this encoding

if !IsFeatureImplemented(FEAT_SME2p1) then EndOfDecode(Decode_UNDEF); end; let s : integer = UInt('011'::Rs); let nreg : integer{} = 4; let esize : integer{} = 8; let d : integer = UInt(Zd::'00'); let n : integer = 0; let offset : integer = UInt(off2::'00'); let vertical : boolean = V == '1';

16-bit
(FEAT_SME2p1)

Decode for this encoding

if !IsFeatureImplemented(FEAT_SME2p1) then EndOfDecode(Decode_UNDEF); end; let s : integer = UInt('011'::Rs); let nreg : integer{} = 4; let esize : integer{} = 16; let d : integer = UInt(Zd::'00'); let n : integer = UInt(ZAn); let offset : integer = UInt(o1::'00'); let vertical : boolean = V == '1';

32-bit
(FEAT_SME2p1)

Decode for this encoding

if !IsFeatureImplemented(FEAT_SME2p1) then EndOfDecode(Decode_UNDEF); end; let s : integer = UInt('011'::Rs); let nreg : integer{} = 4; let esize : integer{} = 32; let d : integer = UInt(Zd::'00'); let n : integer = UInt(ZAn); let offset : integer = 0; let vertical : boolean = V == '1';

64-bit
(FEAT_SME2p1)

Decode for this encoding

if !IsFeatureImplemented(FEAT_SME2p1) then EndOfDecode(Decode_UNDEF); end; if MaxImplementedSVL() < 256 then EndOfDecode(Decode_UNDEF); end; let s : integer = UInt('011'::Rs); let nreg : integer{} = 4; let esize : integer{} = 64; let d : integer = UInt(Zd::'00'); let n : integer = UInt(ZAn); let offset : integer = 0; let vertical : boolean = V == '1';

Assembler Symbols

<Zd1>

Is the name of the first scalable vector register of the destination multi-vector group, encoded as "Zd" times 4.

<Zd4>

Is the name of the fourth scalable vector register of the destination multi-vector group, encoded as "Zd" times 4 plus 3.

<HV>

Is the horizontal or vertical slice indicator, encoded in V:

V	<HV>
0	H
1	V

<Ws>	Is the 32-bit name of the slice index register W12-W15, encoded in the "Rs" field.

<offs1>	For the "8-bit" variant: is the first slice index offset, encoded as "off2" field times 4.
	For the "16-bit" variant: is the first slice index offset, encoded as "o1" field times 4.
	For the "32-bit" and "64-bit" variants: is the first slice index offset, with implicit value 0.

<offs4>	For the "8-bit" variant: is the fourth slice index offset, encoded as "off2" field times 4 plus 3.
	For the "16-bit" variant: is the fourth slice index offset, encoded as "o1" field times 4 plus 3.
	For the "32-bit" and "64-bit" variants: is the fourth slice index offset, with implicit value 3.

<ZAn>	For the "16-bit" variant: is the name of the ZA tile ZA0-ZA1 to be accessed, encoded in the "ZAn" field.
	For the "32-bit" variant: is the name of the ZA tile ZA0-ZA3 to be accessed, encoded in the "ZAn" field.
	For the "64-bit" variant: is the name of the ZA tile ZA0-ZA7 to be accessed, encoded in the "ZAn" field.

Operation

CheckStreamingSVEAndZAEnabled(); let VL : integer{} = CurrentVL(); if nreg == 4 && esize == 64 && VL < 256 then EndOfDecode(Decode_UNDEF); end; let slices : integer = VL DIV esize; let index : bits(32) = X{}(s); let slice : integer = ((UInt(index) - (UInt(index) MOD nreg)) + offset) MOD slices; for r = 0 to nreg-1 do let result : bits(VL) = ZAslice{}(n, esize, vertical, slice + r); ZAslice{VL}(n, esize, vertical, slice + r) = Zeros{VL}; Z{VL}(d + r) = result; end;

Operational information

This instruction is a data-independent-time instruction as described in About PSTATE.DIT.

2026-03_rel 2026-03-26 20:48:11

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	0	0	0	0	0	0	1	1	0	V	Rs		0	0	1	1	0	0	off2		Zd			0	0
								size

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	0	0	1	0	0	0	1	1	0	V	Rs		0	0	1	1	0	0	ZAn	o1	Zd			0	0
								size

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	0	1	0	0	0	0	1	1	0	V	Rs		0	0	1	1	0	0	ZAn		Zd			0	0
								size

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	0	0	1	1	0	0	0	1	1	0	V	Rs		0	0	1	1	0	ZAn			Zd			0	0
								size