Move predicate to vector
This instruction copies the source SVE predicate register elements into the destination vector register as a packed bitmap with one bit per predicate element, where bit value 0b1 represents a TRUE predicate element, and bit value 0b0 represents a FALSE predicate element.
Because the number of bits in an SVE predicate element scales with the vector element size, the behavior varies according to the specified element size.
The portion index is optional, defaulting to 0 if omitted. When the index is zero, the instruction writes zeroes to the most significant VL-(VL/esize) bits of the destination vector register. When a non-zero index is specified, the packed bitmap is inserted into the destination vector register, and the unindexed blocks remain unchanged.
It has encodings from 4 classes: Byte , Doubleword , Halfword and Word
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 0 | Pn | Zd | |||||||
| opc | opc2 | ||||||||||||||||||||||||||||||
if !IsFeatureImplemented(FEAT_SVE2p1) && !IsFeatureImplemented(FEAT_SME2p1) then EndOfDecode(Decode_UNDEF); end; let n : integer = UInt(Pn); let d : integer = UInt(Zd); let esize : integer{} = 8; let imm : integer = 0;
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| 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 1 | i3h | 1 | 0 | 1 | i3l | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 0 | Pn | Zd | ||||||||
if !IsFeatureImplemented(FEAT_SVE2p1) && !IsFeatureImplemented(FEAT_SME2p1) then EndOfDecode(Decode_UNDEF); end; let n : integer = UInt(Pn); let d : integer = UInt(Zd); let esize : integer{} = 64; let imm : integer = UInt(i3h::i3l);
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | i1 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 0 | Pn | Zd | |||||||
| opc | |||||||||||||||||||||||||||||||
if !IsFeatureImplemented(FEAT_SVE2p1) && !IsFeatureImplemented(FEAT_SME2p1) then EndOfDecode(Decode_UNDEF); end; let n : integer = UInt(Pn); let d : integer = UInt(Zd); let esize : integer{} = 16; let imm : integer = UInt(i1);
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | i2 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 0 | Pn | Zd | ||||||||
| opc | |||||||||||||||||||||||||||||||
if !IsFeatureImplemented(FEAT_SVE2p1) && !IsFeatureImplemented(FEAT_SME2p1) then EndOfDecode(Decode_UNDEF); end; let n : integer = UInt(Pn); let d : integer = UInt(Zd); let esize : integer{} = 32; let imm : integer = UInt(i2);
| <Zd> |
Is the name of the destination scalable vector register, encoded in the "Zd" field. |
| <Pn> |
Is the name of the source scalable predicate register, encoded in the "Pn" field. |
CheckSVEEnabled(); let VL : integer{} = CurrentVL(); let PL : integer{} = VL DIV 8; let elements : integer = VL DIV esize; let operand : bits(PL) = P{}(n); var result : bits(VL); if imm == 0 then result = Zeros{VL}; else result = Z{VL}(d); end; for e = 0 to elements-1 do result[(elements * imm) + e] = PredicateElement{PL}(operand, e, esize); end; Z{VL}(d) = result;
This instruction is a data-independent-time instruction as described in About PSTATE.DIT.
2026-03_rel 2026-03-26 20:48:11
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