RDVL

Read multiple of vector register size to scalar register

This instruction multiplies the current vector register size in bytes by an immediate in the range -32 to 31 and places the result in the 64-bit destination general-purpose register.

SVE
(FEAT_SVE || FEAT_SME)

313029282726252423222120191817161514131211109876543210
000001001011111101010imm6Rd
opopc2

Encoding

RDVL <Xd>, #<imm>

Decode for this encoding

if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then EndOfDecode(Decode_UNDEF); end; let d : integer = UInt(Rd); let imm : integer = SInt(imm6);

Assembler Symbols

<Xd>

Is the 64-bit name of the destination general-purpose register, encoded in the "Rd" field.

<imm>

Is the signed immediate operand, in the range -32 to 31, encoded in the "imm6" field.

Operation

CheckSVEEnabled(); let VL : integer{} = CurrentVL(); let len : integer = imm * (VL DIV 8); X{64}(d) = len[63:0];


2026-03_rel 2026-03-26 20:48:11

Copyright © 2010-2026 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.