SBFM

Signed bitfield move

This instruction is usually accessed via one of its aliases, which are always preferred for disassembly.

If <imms> is greater than or equal to <immr>, this copies a bitfield of (<imms>-<immr>+1) bits starting from bit position <immr> in the source register to the least significant bits of the destination register.

If <imms> is less than <immr>, this copies a bitfield of (<imms>+1) bits from the least significant bits of the source register to bit position (regsize-<immr>) of the destination register, where regsize is the destination register size of 32 or 64 bits.

In both cases, the destination bits below the bitfield are set to zero, and the bits above the bitfield are set to a copy of the most significant bit of the bitfield.

This instruction is used by the aliases ASR (immediate), SBFIZ, SBFX, SXTB, SXTH, and SXTW.

313029282726252423222120191817161514131211109876543210
sf00100110NimmrimmsRnRd
opc

Encoding for the 32-bit variant

Applies when (sf == 0 && N == 0)

SBFM <Wd>, <Wn>, #<immr>, #<imms>

Encoding for the 64-bit variant

Applies when (sf == 1 && N == 1)

SBFM <Xd>, <Xn>, #<immr>, #<imms>

Decode for all variants of this encoding

if sf == '1' && N != '1' then EndOfDecode(Decode_UNDEF); end; if sf == '0' && (N != '0' || immr[5] != '0' || imms[5] != '0') then EndOfDecode(Decode_UNDEF); end; let d : integer{} = UInt(Rd); let n : integer{} = UInt(Rn); let datasize : integer{} = 32 << UInt(sf); let s : integer = UInt(imms); let r : integer = UInt(immr); var wmask : bits(datasize); var tmask : bits(datasize); (wmask, tmask) = DecodeBitMasks{datasize}(N, imms, immr, FALSE);

Assembler Symbols

<Wd>

Is the 32-bit name of the general-purpose destination register, encoded in the "Rd" field.

<Wn>

Is the 32-bit name of the general-purpose source register, encoded in the "Rn" field.

<immr>

For the "32-bit" variant: is the right rotate amount, in the range 0 to 31, encoded in the "immr" field.

For the "64-bit" variant: is the right rotate amount, in the range 0 to 63, encoded in the "immr" field.

<imms>

For the "32-bit" variant: is the leftmost bit number to be moved from the source, in the range 0 to 31, encoded in the "imms" field.

For the "64-bit" variant: is the leftmost bit number to be moved from the source, in the range 0 to 63, encoded in the "imms" field.

<Xd>

Is the 64-bit name of the general-purpose destination register, encoded in the "Rd" field.

<Xn>

Is the 64-bit name of the general-purpose source register, encoded in the "Rn" field.

Alias Conditions

AliasOf variantIs preferred when
ASR (immediate)32-bitimms == '011111'
ASR (immediate)64-bitimms == '111111'
SBFIZUInt(imms) < UInt(immr)
SBFXBFXPreferred(sf, opc[1], imms, immr)
SXTBimmr == '000000' && imms == '000111'
SXTHimmr == '000000' && imms == '001111'
SXTWimmr == '000000' && imms == '011111'

Operational information

This instruction is a data-independent-time instruction as described in About PSTATE.DIT.


2026-03_rel 2026-03-26 20:48:11

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