SDIV (quotient)

Signed divide

This instruction divides the first signed source register value by the second signed source register value, and writes the result to the destination register. Dividing by zero writes the value zero to the destination register. The condition flags are not affected.

313029282726252423222120191817161514131211109876543210
sf0011010110Rm000011RnRd
So1

Encoding for the 32-bit variant

Applies when (sf == 0)

SDIV <Wd>, <Wn>, <Wm>

Encoding for the 64-bit variant

Applies when (sf == 1)

SDIV <Xd>, <Xn>, <Xm>

Decode for all variants of this encoding

let d : integer{} = UInt(Rd); let n : integer{} = UInt(Rn); let m : integer{} = UInt(Rm); let datasize : integer{} = 32 << UInt(sf);

Assembler Symbols

<Wd>

Is the 32-bit name of the general-purpose destination register, encoded in the "Rd" field.

<Wn>

Is the 32-bit name of the first general-purpose source register, encoded in the "Rn" field.

<Wm>

Is the 32-bit name of the second general-purpose source register, encoded in the "Rm" field.

<Xd>

Is the 64-bit name of the general-purpose destination register, encoded in the "Rd" field.

<Xn>

Is the 64-bit name of the first general-purpose source register, encoded in the "Rn" field.

<Xm>

Is the 64-bit name of the second general-purpose source register, encoded in the "Rm" field.


2026-03_rel 2026-03-26 20:48:11

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