Signed divide (predicated)
This instruction performs a signed divide on active elements of the first source vector by the corresponding elements of the second source vector and destructively places the quotient in the corresponding elements of the first source vector. Inactive elements in the destination vector register remain unmodified.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | size | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | Pg | Zm | Zdn | |||||||||||
| R | U | ||||||||||||||||||||||||||||||
if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then EndOfDecode(Decode_UNDEF); end; if size IN {'0x'} then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 8 << UInt(size); let g : integer = UInt(Pg); let dn : integer = UInt(Zdn); let m : integer = UInt(Zm);
| <Zdn> |
Is the name of the first source and destination scalable vector register, encoded in the "Zdn" field. |
| <T> |
Is the size specifier,
encoded in
|
| <Pg> |
Is the name of the governing scalable predicate register P0-P7, encoded in the "Pg" field. |
| <Zm> |
Is the name of the second source scalable vector register, encoded in the "Zm" field. |
CheckSVEEnabled(); let VL : integer{} = CurrentVL(); let PL : integer{} = VL DIV 8; let elements : integer = VL DIV esize; let mask : bits(PL) = P{}(g); let operand1 : bits(VL) = Z{}(dn); let operand2 : bits(VL) = if AnyActiveElement{PL}(mask, esize) then Z{VL}(m) else Zeros{VL}; var result : bits(VL); for e = 0 to elements-1 do if ActivePredicateElement{PL}(mask, e, esize) then let dividend : integer = SInt(operand1[e*:esize]); let divisor : integer = SInt(operand2[e*:esize]); var quotient : integer; if divisor == 0 then quotient = 0; elsif (dividend < 0) == (divisor < 0) then quotient = Abs(dividend) DIVRM Abs(divisor); // same signs - positive result else quotient = -(Abs(dividend) DIVRM Abs(divisor)); // different signs - negative result end; result[e*:esize] = quotient[esize-1:0]; else result[e*:esize] = operand1[e*:esize]; end; end; Z{VL}(dn) = result;
This instruction might be immediately preceded in program order by a MOVPRFX instruction. The MOVPRFX must conform to all of the following requirements, otherwise the behavior of the MOVPRFX and this instruction is CONSTRAINED UNPREDICTABLE:
2026-03_rel 2026-03-26 20:48:11
Copyright © 2010-2026 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.