SEL (vectors) -- A64

This instruction selects elements from the first source vector where the corresponding vector select predicate element is true, and from the second source vector where the predicate element is false, and places them in the corresponding elements of the destination vector.

SVE
(FEAT_SVE || FEAT_SME)

Decode for this encoding

if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 8 << UInt(size); let v : integer = UInt(Pv); let n : integer = UInt(Zn); let m : integer = UInt(Zm); let d : integer = UInt(Zd);

Assembler Symbols

<Zd>	Is the name of the destination scalable vector register, encoded in the "Zd" field.

<T>

Is the size specifier, encoded in size:

size	<T>
00	B
01	H
10	S
11	D

<Pv>	Is the name of the vector select predicate register, encoded in the "Pv" field.

<Zn>	Is the name of the first source scalable vector register, encoded in the "Zn" field.

<Zm>	Is the name of the second source scalable vector register, encoded in the "Zm" field.

Alias Conditions

Alias	Is preferred when
MOV (vector, predicated)	Zd == Zm

Operation

CheckSVEEnabled(); let VL : integer{} = CurrentVL(); let PL : integer{} = VL DIV 8; let elements : integer = VL DIV esize; let mask : bits(PL) = P{}(v); let operand1 : bits(VL) = if AnyActiveElement{PL}(mask, esize) then Z{VL}(n) else Zeros{VL}; let operand2 : bits(VL) = if AnyActiveElement{PL}(NOT(mask), esize) then Z{VL}(m) else Zeros{VL}; var result : bits(VL); for e = 0 to elements-1 do if ActivePredicateElement{PL}(mask, e, esize) then result[e*:esize] = operand1[e*:esize]; else result[e*:esize] = operand2[e*:esize]; end; end; Z{VL}(d) = result;

Operational information

This instruction is a data-independent-time instruction as described in About PSTATE.DIT.

2026-03_rel 2026-03-26 20:48:11

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	1	size		1	Zm					1	1	Pv				Zn					Zd

SEL (vectors)