SM4E

SM4 encode

This instruction takes input data as a 128-bit vector from the first source SIMD&FP register, and four iterations of the round key held as the elements of the 128-bit vector in the second source SIMD&FP register. It encrypts the data by four rounds, in accordance with the SM4 standard, returning the 128-bit result to the destination SIMD&FP register.

Advanced SIMD
(FEAT_SM4)

313029282726252423222120191817161514131211109876543210
1100111011000000100001RnRd
opcode

Encoding

SM4E <Vd>.4S, <Vn>.4S

Decode for this encoding

if !IsFeatureImplemented(FEAT_SM4) then EndOfDecode(Decode_UNDEF); end; let d : integer{} = UInt(Rd); let n : integer{} = UInt(Rn);

Assembler Symbols

<Vd>

Is the name of the SIMD&FP source and destination register, encoded in the "Rd" field.

<Vn>

Is the name of the second SIMD&FP source register, encoded in the "Rn" field.

Operation

AArch64_CheckFPAdvSIMDEnabled(); let Vn : bits(128) = V{}(n); var intval : bits(32); var roundresult : bits(128); var roundkey : bits(32); roundresult = V{128}(d); for index = 0 to 3 do roundkey = Vn[index*:32]; intval = roundresult[127:96] XOR roundresult[95:64] XOR roundresult[63:32] XOR roundkey; for i = 0 to 3 do intval[i*:8] = Sbox(intval[i*:8]); end; intval = intval XOR ROL(intval, 2) XOR ROL(intval, 10) XOR ROL(intval, 18) XOR ROL(intval, 24); intval = intval XOR roundresult[31:0]; roundresult[31:0] = roundresult[63:32]; roundresult[63:32] = roundresult[95:64]; roundresult[95:64] = roundresult[127:96]; roundresult[127:96] = intval; end; V{128}(d) = roundresult;

Operational information

This instruction is a data-independent-time instruction as described in About PSTATE.DIT.


2026-03_rel 2026-03-26 20:48:11

Copyright © 2010-2026 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.