SMMLA (vector)

Signed 8-bit integer matrix multiply-accumulate to 32-bit integer (vector)

This instruction multiplies the 2x8 matrix of signed 8-bit integer values in the first source vector by the 8x2 matrix of signed 8-bit integer values in the second source vector. The resulting 2x2 32-bit integer matrix product is destructively added to the 32-bit integer matrix accumulator in the destination vector. This is equivalent to performing an 8-way dot product per destination element.

From Armv8.2 to Armv8.5, this is an OPTIONAL instruction. From Armv8.6 it is mandatory for implementations that include Advanced SIMD to support it. ID_AA64ISAR1_EL1.I8MM indicates whether this instruction is supported.

Vector
(FEAT_I8MM)

313029282726252423222120191817161514131211109876543210
01001110100Rm101001RnRd
QUsizeB

Encoding

SMMLA <Vd>.4S, <Vn>.16B, <Vm>.16B

Decode for this encoding

if !IsFeatureImplemented(FEAT_I8MM) then EndOfDecode(Decode_UNDEF); end; let d : integer{} = UInt(Rd); let n : integer{} = UInt(Rn); let m : integer{} = UInt(Rm); let op1_unsigned : boolean = FALSE; let op2_unsigned : boolean = FALSE;

Assembler Symbols

<Vd>

Is the name of the SIMD&FP third source and destination register, encoded in the "Rd" field.

<Vn>

Is the name of the first SIMD&FP source register, encoded in the "Rn" field.

<Vm>

Is the name of the second SIMD&FP source register, encoded in the "Rm" field.

Operation

AArch64_CheckFPAdvSIMDEnabled(); let operand1 : bits(128) = V{}(n); let operand2 : bits(128) = V{}(m); let addend : bits(128) = V{}(d); V{128}(d) = MatMulAdd(addend, operand1, operand2, op1_unsigned, op2_unsigned);

Operational information

Arm expects that the SMMLA (vector) instruction will deliver a peak integer multiply throughput that is at least as high as can be achieved using two SDOT (vector) instructions, with a goal that it should have significantly higher throughput.

This instruction is a data-independent-time instruction as described in About PSTATE.DIT.


2026-03_rel 2026-03-26 20:48:11

Copyright © 2010-2026 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.