SQDMULH (multiple vectors)

Multi-vector signed saturating doubling multiply high

This instruction multiplies the corresponding signed elements of the two or four first and second source vectors, and then doubles the result and destructively places the most significant half of the result in the corresponding elements of the two or four first source vectors. Each result element is saturated to the N-bit element's signed integer range -2(N-1) to (2(N-1))-1.

This instruction is unpredicated.

It has encodings from 2 classes: Two registers and Four registers

Two registers
(FEAT_SME2)

313029282726252423222120191817161514131211109876543210
11000001size1Zm010110100000Zdn0
op

Encoding

SQDMULH { <Zdn1>.<T>-<Zdn2>.<T> }, { <Zdn1>.<T>-<Zdn2>.<T> }, { <Zm1>.<T>-<Zm2>.<T> }

Decode for this encoding

if !IsFeatureImplemented(FEAT_SME2) then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 8 << UInt(size); let dn : integer = UInt(Zdn::'0'); let m : integer = UInt(Zm::'0'); let nreg : integer{} = 2;

Four registers
(FEAT_SME2)

313029282726252423222120191817161514131211109876543210
11000001size1Zm0010111100000Zdn00
op

Encoding

SQDMULH { <Zdn1>.<T>-<Zdn4>.<T> }, { <Zdn1>.<T>-<Zdn4>.<T> }, { <Zm1>.<T>-<Zm4>.<T> }

Decode for this encoding

if !IsFeatureImplemented(FEAT_SME2) then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 8 << UInt(size); let dn : integer = UInt(Zdn::'00'); let m : integer = UInt(Zm::'00'); let nreg : integer{} = 4;

Assembler Symbols

<Zdn1>

For the "Two registers" variant: is the name of the first scalable vector register of the destination and first source multi-vector group, encoded as "Zdn" times 2.

For the "Four registers" variant: is the name of the first scalable vector register of the destination and first source multi-vector group, encoded as "Zdn" times 4.

<T>

Is the size specifier, encoded in size:

size <T>
00 B
01 H
10 S
11 D
<Zdn2>

Is the name of the second scalable vector register of the destination and first source multi-vector group, encoded as "Zdn" times 2 plus 1.

<Zm1>

For the "Two registers" variant: is the name of the first scalable vector register of the second source multi-vector group, encoded as "Zm" times 2.

For the "Four registers" variant: is the name of the first scalable vector register of the second source multi-vector group, encoded as "Zm" times 4.

<Zm2>

Is the name of the second scalable vector register of the second source multi-vector group, encoded as "Zm" times 2 plus 1.

<Zdn4>

Is the name of the fourth scalable vector register of the destination and first source multi-vector group, encoded as "Zdn" times 4 plus 3.

<Zm4>

Is the name of the fourth scalable vector register of the second source multi-vector group, encoded as "Zm" times 4 plus 3.

Operation

CheckStreamingSVEEnabled(); let VL : integer{} = CurrentVL(); let elements : integer = VL DIV esize; var results : array [[4]] of bits(VL); for r = 0 to nreg-1 do let operand1 : bits(VL) = Z{}(dn+r); let operand2 : bits(VL) = Z{}(m+r); for e = 0 to elements-1 do let element1 : integer = SInt(operand1[e*:esize]); let element2 : integer = SInt(operand2[e*:esize]); let res : integer = 2 * element1 * element2; results[[r]][e*:esize] = SignedSat{esize}(res >> esize); end; end; for r = 0 to nreg-1 do Z{VL}(dn+r) = results[[r]]; end;

Operational information

This instruction is a data-independent-time instruction as described in About PSTATE.DIT.


2026-03_rel 2026-03-26 20:48:11

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