SQDMULLT (vectors)

Signed saturating doubling multiply (top)

This instruction multiplies the odd-numbered signed elements of the first source vector by the corresponding elements of the second source vector, and then doubles and places the results in the overlapping double-width elements of the destination vector. Each result element is saturated to the double-width N-bit element's signed integer range -2(N-1) to (2(N-1))-1. This instruction is unpredicated.

SVE2
(FEAT_SVE2 || FEAT_SME)

313029282726252423222120191817161514131211109876543210
01000101size0Zm011001ZnZd
opUT

Encoding

SQDMULLT <Zd>.<T>, <Zn>.<Tb>, <Zm>.<Tb>

Decode for this encoding

if !IsFeatureImplemented(FEAT_SVE2) && !IsFeatureImplemented(FEAT_SME) then EndOfDecode(Decode_UNDEF); end; if size == '00' then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 8 << UInt(size); let n : integer = UInt(Zn); let m : integer = UInt(Zm); let d : integer = UInt(Zd);

Assembler Symbols

<Zd>

Is the name of the destination scalable vector register, encoded in the "Zd" field.

<T>

Is the size specifier, encoded in size:

size <T>
00 RESERVED
01 H
10 S
11 D
<Zn>

Is the name of the first source scalable vector register, encoded in the "Zn" field.

<Tb>

Is the size specifier, encoded in size:

size <Tb>
00 RESERVED
01 B
10 H
11 S
<Zm>

Is the name of the second source scalable vector register, encoded in the "Zm" field.

Operation

CheckSVEEnabled(); let VL : integer{} = CurrentVL(); let elements : integer = VL DIV esize; let operand1 : bits(VL) = Z{}(n); let operand2 : bits(VL) = Z{}(m); var result : bits(VL); for e = 0 to elements-1 do let element1 : integer = SInt(operand1[(2*e + 1)*:(esize DIV 2)]); let element2 : integer = SInt(operand2[(2*e + 1)*:(esize DIV 2)]); let res : integer = 2 * element1 * element2; result[e*:esize] = SignedSat{esize}(res); end; Z{VL}(d) = result;


2026-03_rel 2026-03-26 20:48:11

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