Signed saturating rounding shift right narrow by immediate to interleaved integer
This instruction shifts right by an immediate value the signed integer value in each element of the two source vectors, and places the two-way interleaved rounded results in the half-width destination elements. Each result element is saturated to the half-width N-bit element's signed integer range -2(N-1) to (2(N-1) )-1. The immediate shift amount is an unsigned value in the range 1 to 16.
This instruction is unpredicated.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | 1 | 0 | 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | imm4 | 0 | 0 | 1 | 0 | 1 | 0 | Zn | 0 | Zd | ||||||||||
| op0 | op1 | U | R | ||||||||||||||||||||||||||||
if !IsFeatureImplemented(FEAT_SME2) && !IsFeatureImplemented(FEAT_SVE2p1) then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 16; let n : integer = UInt(Zn::'0'); let d : integer = UInt(Zd); let shift : integer = esize - UInt(imm4);
| <Zd> |
Is the name of the destination scalable vector register, encoded in the "Zd" field. |
| <Zn1> |
Is the name of the first scalable vector register of the source multi-vector group, encoded as "Zn" times 2. |
| <Zn2> |
Is the name of the second scalable vector register of the source multi-vector group, encoded as "Zn" times 2 plus 1. |
| <const> |
Is the immediate shift amount, in the range 1 to 16, encoded in the "imm4" field. |
CheckSVEEnabled(); let VL : integer{} = CurrentVL(); let elements : integer = VL DIV (2 * esize); var result : bits(VL); for e = 0 to elements-1 do for i = 0 to 1 do let operand : bits(VL) = Z{}(n+i); let element : bits(2 * esize) = operand[e*:(2 * esize)]; let res : integer = (SInt(element) + (1 << (shift-1))) >> shift; result[(2*e + i)*:esize] = SignedSat{esize}(res); end; end; Z{VL}(d) = result;
2026-03_rel 2026-03-26 20:48:11
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