Contiguous store of quadwords from 128-bit element ZA tile slice
This instruction performs a contiguous store of quadwords from a 128-bit element ZA tile slice. The slice number in the tile is selected by the slice index register, modulo the number of 128-bit elements in a Streaming SVE vector. The memory address is generated by scalar base and optional scalar offset that is multiplied by 16 and added to the base address. Inactive elements are not written to memory.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | Rm | V | Rs | Pg | Rn | 0 | ZAt | ||||||||||||||
if !IsFeatureImplemented(FEAT_SME) then EndOfDecode(Decode_UNDEF); end; let n : integer = UInt(Rn); let m : integer = UInt(Rm); let g : integer = UInt('0'::Pg); let s : integer = UInt('011'::Rs); let t : integer = UInt(ZAt); let offset : integer = 0; let esize : integer{} = 128; let vertical : boolean = V == '1';
| <ZAt> |
Is the name of the ZA tile ZA0-ZA15 to be accessed, encoded in the "ZAt" field. |
| <HV> |
Is the horizontal or vertical slice indicator,
encoded in
|
| <Ws> |
Is the 32-bit name of the slice index register W12-W15, encoded in the "Rs" field. |
| <offs> |
Is the slice index offset, with implicit value 0. |
| <Pg> |
Is the name of the governing scalable predicate register P0-P7, encoded in the "Pg" field. |
| <Xn|SP> |
Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field. |
| <Xm> |
Is the optional 64-bit name of the general-purpose offset register, defaulting to XZR, encoded in the "Rm" field. |
CheckStreamingSVEAndZAEnabled(); let VL : integer{} = CurrentVL(); let PL : integer{} = VL DIV 8; let dim : integer = VL DIV esize; var base : bits(64); var addr : bits(64); let mask : bits(PL) = P{}(g); var moffs : bits(64) = X{}(m); let index : bits(32) = X{}(s); let slice : integer = (UInt(index) + offset) MOD dim; var src : bits(VL); let mbytes : integer{} = esize DIV 8; let contiguous : boolean = TRUE; let nontemporal : boolean = FALSE; let tagchecked : boolean = TRUE; let accdesc : AccessDescriptor = CreateAccDescSME(MemOp_STORE, nontemporal, contiguous, tagchecked); if n == 31 then if (AnyActiveElement{PL}(mask, esize) || ConstrainUnpredictableBool(Unpredictable_CHECKSPNONEACTIVE)) then CheckSPAlignment(); end; base = SP{64}(); else base = X{64}(n); end; src = ZAslice{VL}(t, esize, vertical, slice); for e = 0 to dim-1 do addr = AddressAdd(base, UInt(moffs) * mbytes, accdesc); if ActivePredicateElement{PL}(mask, e, esize) then Mem{esize}(addr, accdesc) = src[e*:esize]; end; moffs = moffs + 1; end;
This instruction is a data-independent-time instruction as described in About PSTATE.DIT.
2026-03_rel 2026-03-26 20:48:11
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