Store-release register
This instruction stores a 32-bit word or a 64-bit doubleword to a memory location, from a register. The instruction also has memory ordering semantics as described in Load-Acquire, Store-Release. For information about addressing modes, see Load/Store addressing modes.
It has encodings from 2 classes: No offset and Pre-index
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 1 | x | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | (1) | (1) | (1) | (1) | (1) | 1 | (1) | (1) | (1) | (1) | (1) | Rn | Rt | ||||||||
| size | L | Rs | o0 | Rt2 | |||||||||||||||||||||||||||
let t : integer{} = UInt(Rt); let n : integer{} = UInt(Rn); let wback : boolean = FALSE; let offset : integer = 0; let rt_unknown : boolean = FALSE; let elsize : integer{} = 8 << UInt(size); let datasize : integer{} = elsize; let acquire : boolean = FALSE; let tagchecked : boolean = n != 31;
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 1 | x | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | Rn | Rt | ||||||||
| size | L | ||||||||||||||||||||||||||||||
if !IsFeatureImplemented(FEAT_LRCPC3) then EndOfDecode(Decode_UNDEF); end; let wback : boolean = TRUE; let t : integer{} = UInt(Rt); let n : integer{} = UInt(Rn); let datasize : integer{} = 8 << UInt(size); let offset : integer = -1 * (1 << UInt(size)); let acquire : boolean = FALSE; let tagchecked : boolean = TRUE; var rt_unknown : boolean = FALSE; if n == t && n != 31 then let c : Constraint = ConstrainUnpredictable(Unpredictable_WBOVERLAPST); assert c IN {Constraint_NONE, Constraint_UNKNOWN, Constraint_UNDEF, Constraint_NOP}; case c of when Constraint_NONE => rt_unknown = FALSE; // value stored is original value when Constraint_UNKNOWN => rt_unknown = TRUE; // value stored is UNKNOWN when Constraint_UNDEF => EndOfDecode(Decode_UNDEF); when Constraint_NOP => EndOfDecode(Decode_NOP); end; end;
| <Wt> |
Is the 32-bit name of the general-purpose register to be transferred, encoded in the "Rt" field. |
| <Xn|SP> |
Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field. |
| <Xt> |
Is the 64-bit name of the general-purpose register to be transferred, encoded in the "Rt" field. |
var address : bits(64); let dbytes : integer{} = datasize DIV 8; let accdesc : AccessDescriptor = CreateAccDescAcqRel(MemOp_STORE, tagchecked, acquire, t); if n == 31 then CheckSPAlignment(); address = SP{64}(); else address = X{64}(n); end; address = AddressAdd(address, offset, accdesc); var data : bits(datasize); if rt_unknown then data = ARBITRARY : bits(datasize); else data = X{datasize}(t); end; Mem{datasize}(address, accdesc) = data; if wback then if n == 31 then SP{64}() = address; else X{64}(n) = address; end; end;
This instruction is a data-independent-time instruction as described in About PSTATE.DIT.
2026-03_rel 2026-03-26 20:48:11
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