Store register halfword (immediate)
This instruction stores the least significant halfword of a 32-bit register to memory. The address that is used for the store is calculated from a base register and an immediate offset. For information about addressing modes, see Load/Store addressing modes.
It has encodings from 3 classes: Post-index , Pre-index and Unsigned offset
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| 0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | imm9 | 0 | 1 | Rn | Rt | ||||||||||||||||
| size | VR | opc | |||||||||||||||||||||||||||||
let wback : boolean = TRUE; let postindex : boolean = TRUE; let offset : bits(64) = SignExtend{}(imm9);
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| 0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | imm9 | 1 | 1 | Rn | Rt | ||||||||||||||||
| size | VR | opc | |||||||||||||||||||||||||||||
let wback : boolean = TRUE; let postindex : boolean = FALSE; let offset : bits(64) = SignExtend{}(imm9);
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| 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 0 | imm12 | Rn | Rt | |||||||||||||||||||
| size | VR | opc | |||||||||||||||||||||||||||||
let wback : boolean = FALSE; let postindex : boolean = FALSE; let offset : bits(64) = LSL(ZeroExtend{64}(imm12), 1);
For information about the CONSTRAINED UNPREDICTABLE behavior of this instruction, see Architectural Constraints on UNPREDICTABLE behaviors, and particularly STRH (immediate).
| <Wt> |
Is the 32-bit name of the general-purpose register to be transferred, encoded in the "Rt" field. |
| <Xn|SP> |
Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field. |
| <simm> |
Is the signed immediate byte offset, in the range -256 to 255, encoded in the "imm9" field. |
| <pimm> |
Is the optional positive immediate byte offset, a multiple of 2 in the range 0 to 8190, defaulting to 0 and encoded in the "imm12" field as <pimm>/2. |
let t : integer{} = UInt(Rt); let n : integer{} = UInt(Rn); let nontemporal : boolean = FALSE; let tagchecked : boolean = wback || n != 31; var c : Constraint; var rt_unknown : boolean = FALSE; if wback && n == t && n != 31 then c = ConstrainUnpredictable(Unpredictable_WBOVERLAPST); assert c IN {Constraint_NONE, Constraint_UNKNOWN, Constraint_UNDEF, Constraint_NOP}; case c of when Constraint_NONE => rt_unknown = FALSE; // Value stored is original value when Constraint_UNKNOWN => rt_unknown = TRUE; // Value stored is UNKNOWN when Constraint_UNDEF => EndOfDecode(Decode_UNDEF); when Constraint_NOP => EndOfDecode(Decode_NOP); end; end;
var address : bits(64); let privileged : boolean = PSTATE.EL != EL0; let accdesc : AccessDescriptor = CreateAccDescGPR(MemOp_STORE, nontemporal, privileged, tagchecked, t); if n == 31 then CheckSPAlignment(); address = SP{64}(); else address = X{64}(n); end; if !postindex then address = AddressAdd(address, offset, accdesc); end; var data : bits(16); if rt_unknown then data = ARBITRARY : bits(16); else data = X{16}(t); end; Mem{16}(address, accdesc) = data; if wback then if postindex then address = AddressAdd(address, offset, accdesc); end; if n == 31 then SP{64}() = address; else X{64}(n) = address; end; end;
This instruction is a data-independent-time instruction as described in About PSTATE.DIT.
2026-03_rel 2026-03-26 20:48:11
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