SUB (extended register) -- A64

This instruction subtracts a sign or zero-extended register value, followed by an optional left shift amount, from a register value, and writes the result to the destination register. The argument that is extended from the <Rm> register can be a byte, halfword, word, or doubleword.

Decode for all variants of this encoding

if imm3 IN {'101', '110', '111'} then EndOfDecode(Decode_UNDEF); end; let d : integer{} = UInt(Rd); let n : integer{} = UInt(Rn); let m : integer{} = UInt(Rm); let shift : integer{} = UInt(imm3) as integer{0..4}; let datasize : integer{} = 32 << UInt(sf); let extend_type : ExtendType = DecodeRegExtend(option);

Assembler Symbols

<Wd|WSP>

Is the 32-bit name of the destination general-purpose register or stack pointer, encoded in the "Rd" field.

<Wn|WSP>

Is the 32-bit name of the first source general-purpose register or stack pointer, encoded in the "Rn" field.

<Wm>	Is the 32-bit name of the second general-purpose source register, encoded in the "Rm" field.

For the "32-bit" variant: is the extension to be applied to the second source operand, encoded in option:

option	<extend>
000	UXTB
001	UXTH
010	LSL\|UXTW
011	UXTX
100	SXTB
101	SXTH
110	SXTW
111	SXTX

If "Rd" or "Rn" is '11111' (WSP) and "option" is '010' then LSL is preferred, but may be omitted when "imm3" is '000'. In all other cases <extend> is required and must be UXTW when "option" is '010'.

For the "64-bit" variant: is the extension to be applied to the second source operand, encoded in option:

option	<extend>
000	UXTB
001	UXTH
010	UXTW
011	LSL\|UXTX
100	SXTB
101	SXTH
110	SXTW
111	SXTX

If "Rd" or "Rn" is '11111' (SP) and "option" is '011' then LSL is preferred, but may be omitted when "imm3" is '000'. In all other cases <extend> is required and must be UXTX when "option" is '011'.

Is the left shift amount to be applied after extension in the range 0 to 4, defaulting to 0, encoded in the "imm3" field. It must be absent when <extend> is absent, is required when <extend> is LSL, and is optional when <extend> is present but not LSL.

<Xd|SP>

Is the 64-bit name of the destination general-purpose register or stack pointer, encoded in the "Rd" field.

<Xn|SP>

Is the 64-bit name of the first source general-purpose register or stack pointer, encoded in the "Rn" field.

<R>

Is a width specifier, encoded in option:

option	<R>
00x	W
010	W
x11	X
10x	W
110	W

<m>	Is the number [0-30] of the second general-purpose source register or the name ZR (31), encoded in the "Rm" field.

Operation

let operand1 : bits(datasize) = if n == 31 then SP{datasize}() else X{datasize}(n); let operand2 : bits(datasize) = NOT(ExtendReg{datasize}(m, extend_type, shift)); var result : bits(datasize); (result, -) = AddWithCarry{datasize}(operand1, operand2, '1'); if d == 31 then SP{64}() = ZeroExtend{64}(result); else X{datasize}(d) = result; end;

Operational information

This instruction is a data-independent-time instruction as described in About PSTATE.DIT.

2026-03_rel 2026-03-26 20:48:11

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
sf	1	0	0	1	0	1	1	0	0	1	Rm					option			imm3			Rn					Rd
	op	S						opt