Multi-vector subtract from ZA array vectors
This instruction destructively subtracts all elements of the two or four source vectors from the corresponding elements of the ZA single-vector groups.
The single-vector group within each half of or each quarter of the ZA array is selected by the sum of the vector select register and offset, modulo half or quarter the number of ZA array vectors.
The vector group symbol, VGx2 or VGx4, indicates that the ZA operand consists of two or four ZA single-vector groups respectively. The vector group symbol is preferred for disassembly, but optional in assembler source code.
This instruction is unpredicated.
ID_AA64SMFR0_EL1.I16I64 indicates whether the 64-bit integer variant is implemented.
It has encodings from 2 classes: Two ZA single-vectors and Four ZA single-vectors
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | sz | 1 | 0 | 0 | 0 | 0 | 0 | 0 | Rv | 1 | 1 | 1 | Zm | 0 | 1 | 1 | off3 | ||||||
| S | |||||||||||||||||||||||||||||||
if !IsFeatureImplemented(FEAT_SME2) then EndOfDecode(Decode_UNDEF); end; if sz == '1' && !IsFeatureImplemented(FEAT_SME_I16I64) then EndOfDecode(Decode_UNDEF); end; let v : integer = UInt('010'::Rv); let esize : integer{} = 32 << UInt(sz); let m : integer = UInt(Zm::'0'); let offset : integer = UInt(off3); let nreg : integer{} = 2;
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | sz | 1 | 0 | 0 | 0 | 0 | 1 | 0 | Rv | 1 | 1 | 1 | Zm | 0 | 0 | 1 | 1 | off3 | |||||
| S | |||||||||||||||||||||||||||||||
if !IsFeatureImplemented(FEAT_SME2) then EndOfDecode(Decode_UNDEF); end; if sz == '1' && !IsFeatureImplemented(FEAT_SME_I16I64) then EndOfDecode(Decode_UNDEF); end; let v : integer = UInt('010'::Rv); let esize : integer{} = 32 << UInt(sz); let m : integer = UInt(Zm::'00'); let offset : integer = UInt(off3); let nreg : integer{} = 4;
| <T> |
Is the size specifier,
encoded in
|
| <Wv> |
Is the 32-bit name of the vector select register W8-W11, encoded in the "Rv" field. |
| <offs> |
Is the vector select offset, in the range 0 to 7, encoded in the "off3" field. |
| <Zm2> |
Is the name of the second scalable vector register of the source multi-vector group, encoded as "Zm" times 2 plus 1. |
| <Zm4> |
Is the name of the fourth scalable vector register of the source multi-vector group, encoded as "Zm" times 4 plus 3. |
CheckStreamingSVEAndZAEnabled(); let VL : integer{} = CurrentVL(); let elements : integer = VL DIV esize; let vectors : integer = VL DIV 8; let vstride : integer = vectors DIV nreg; let vbase : bits(32) = X{}(v); var vec : integer = (UInt(vbase) + offset) MOD vstride; var result : bits(VL); for r = 0 to nreg-1 do let operand1 : bits(VL) = ZAvector{}(vec); let operand2 : bits(VL) = Z{}(m+r); for e = 0 to elements-1 do let element1 : bits(esize) = operand1[e*:esize]; let element2 : bits(esize) = operand2[e*:esize]; result[e*:esize] = element1 - element2; end; ZAvector{VL}(vec) = result; vec = vec + vstride; end;
This instruction is a data-independent-time instruction as described in About PSTATE.DIT.
2026-03_rel 2026-03-26 20:48:11
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