Unsigned minimum pairwise
This instruction calculates the minimum value of each pair of adjacent unsigned integer elements within each source vector, and interleaves the results from corresponding lanes. The interleaved result values are destructively placed in the first source vector.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | size | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | Pg | Zm | Zdn | |||||||||||
| opc | U | ||||||||||||||||||||||||||||||
if !IsFeatureImplemented(FEAT_SVE2) && !IsFeatureImplemented(FEAT_SME) then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 8 << UInt(size); let g : integer = UInt(Pg); let m : integer = UInt(Zm); let dn : integer = UInt(Zdn);
| <Zdn> |
Is the name of the first source and destination scalable vector register, encoded in the "Zdn" field. |
| <T> |
Is the size specifier,
encoded in
|
| <Pg> |
Is the name of the governing scalable predicate register P0-P7, encoded in the "Pg" field. |
| <Zm> |
Is the name of the second source scalable vector register, encoded in the "Zm" field. |
CheckSVEEnabled(); let VL : integer{} = CurrentVL(); let PL : integer{} = VL DIV 8; let elements : integer = VL DIV esize; let mask : bits(PL) = P{}(g); let operand1 : bits(VL) = Z{}(dn); let operand2 : bits(VL) = if AnyActiveElement{PL}(mask, esize) then Z{VL}(m) else Zeros{VL}; var result : bits(VL); var element1 : integer; var element2 : integer; for e = 0 to elements-1 do if !ActivePredicateElement{PL}(mask, e, esize) then result[e*:esize] = operand1[e*:esize]; else if IsEven(e) then element1 = UInt(operand1[(e + 0)*:esize]); element2 = UInt(operand1[(e + 1)*:esize]); else element1 = UInt(operand2[(e - 1)*:esize]); element2 = UInt(operand2[(e + 0)*:esize]); end; let res : integer = Min(element1, element2); result[e*:esize] = res[esize-1:0]; end; end; Z{VL}(dn) = result;
This instruction is a data-independent-time instruction as described in About PSTATE.DIT.
This instruction might be immediately preceded in program order by a MOVPRFX instruction. The MOVPRFX must conform to all of the following requirements, otherwise the behavior of the MOVPRFX and this instruction is CONSTRAINED UNPREDICTABLE:
2026-03_rel 2026-03-26 20:48:11
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