URSQRTE

Unsigned reciprocal square root estimate

This instruction reads each vector element from the source SIMD&FP register, calculates an approximate inverse square root for each value, places the result into a vector, and writes the vector to the destination SIMD&FP register. All the values in this instruction are unsigned integer values.

Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.

Vector
(FEAT_AdvSIMD)

313029282726252423222120191817161514131211109876543210
0Q1011101sz100001110010RnRd
Uopcode

Encoding

URSQRTE <Vd>.<T>, <Vn>.<T>

Decode for this encoding

if !IsFeatureImplemented(FEAT_AdvSIMD) then EndOfDecode(Decode_UNDEF); end; let d : integer = UInt(Rd); let n : integer = UInt(Rn); if sz == '1' then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 32; let datasize : integer{} = 64 << UInt(Q); let elements : integer = datasize DIV esize;

Assembler Symbols

<Vd>

Is the name of the SIMD&FP destination register, encoded in the "Rd" field.

<T>

Is an arrangement specifier, encoded in (sz :: Q):

sz Q <T>
0 0 2S
0 1 4S
1 x RESERVED
<Vn>

Is the name of the SIMD&FP source register, encoded in the "Rn" field.

Operation

AArch64_CheckFPAdvSIMDEnabled(); let operand : bits(datasize) = V{}(n); var result : bits(datasize); var element : bits(32); for e = 0 to elements-1 do element = operand[e*:32]; result[e*:32] = UnsignedRSqrtEstimate{32}(element); end; V{datasize}(d) = result;


2026-03_rel 2026-03-26 20:48:11

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