WHILELO (predicate pair)

While incrementing unsigned scalar lower than scalar (pair of predicates)

This instruction generates a pair of predicates that starting from the lowest numbered element of the pair is true while the incrementing value of the first, unsigned scalar operand is lower than the second scalar operand and false thereafter up to the highest numbered element of the pair.

The full width of the scalar operands is significant for the purposes of comparison, and the full width first operand is incremented by one for each destination predicate element, irrespective of the predicate result element size. The first general-purpose source register is not itself updated.

The lower-numbered elements are placed in the first predicate destination register, and the higher-numbered elements in the second predicate destination register. This instruction sets the First (N), None (Z), and !Last (C) condition flags based on the predicate result, and sets the V flag to zero.

SVE2
(FEAT_SME2 || FEAT_SVE2p1)

313029282726252423222120191817161514131211109876543210
00100101size1Rm010111Rn1Pd0
Ulteq

Encoding

WHILELO { <Pd1>.<T>, <Pd2>.<T> }, <Xn>, <Xm>

Decode for this encoding

if !IsFeatureImplemented(FEAT_SME2) && !IsFeatureImplemented(FEAT_SVE2p1) then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 8 << UInt(size); let rsize : integer{} = 64; let n : integer = UInt(Rn); let m : integer = UInt(Rm); let d0 : integer = UInt(Pd::'0'); let d1 : integer = UInt(Pd::'1'); let unsigned : boolean = TRUE; let op : CmpOp = Cmp_LT;

Assembler Symbols

<Pd1>

Is the name of the first destination scalable predicate register, encoded as "Pd" times 2.

<T>

Is the size specifier, encoded in size:

size <T>
00 B
01 H
10 S
11 D
<Pd2>

Is the name of the second destination scalable predicate register, encoded as "Pd" times 2 plus 1.

<Xn>

Is the 64-bit name of the first source general-purpose register, encoded in the "Rn" field.

<Xm>

Is the 64-bit name of the second source general-purpose register, encoded in the "Rm" field.

Operation

CheckSVEEnabled(); let VL : integer{} = CurrentVL(); let PL : integer{} = VL DIV 8; let elements : integer = VL DIV esize; let mask : bits(PL*2) = Ones{}; var operand1 : bits(rsize) = X{}(n); let operand2 : bits(rsize) = X{}(m); var result : bits(PL*2); var last : boolean = TRUE; let psize : integer{} = esize DIV 8; let element2 : integer = if unsigned then UInt(operand2) else SInt(operand2); for e = 0 to (elements*2)-1 do let element1 : integer = if unsigned then UInt(operand1) else SInt(operand1); var cond : boolean; case op of when Cmp_LT => cond = (element1 < element2); when Cmp_LE => cond = (element1 <= element2); end; last = last && cond; let pbit : bit = if last then '1' else '0'; result[e*:psize] = ZeroExtend{psize}(pbit); operand1 = operand1 + 1; end; PSTATE.[N,Z,C,V] = PredTest{PL*2}(mask, result, esize); P{PL}(d0) = result[PL-1:0]; P{PL}(d1) = result[PL*2-1:PL];


2026-03_rel 2026-03-26 20:48:11

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