ZIP (four registers)

Interleave elements from four vectors

This instruction places the four-way interleaved elements from the four source vectors in the corresponding elements of the four destination vectors.

This instruction is unpredicated.

It has encodings from 2 classes: 8-bit to 64-bit elements and 128-bit element

8-bit to 64-bit elements
(FEAT_SME2)

Decode for this encoding

if !IsFeatureImplemented(FEAT_SME2) then EndOfDecode(Decode_UNDEF); end; if size == '11' && MaxImplementedSVL() < 256 then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 8 << UInt(size); let n : integer = UInt(Zn::'00'); let d : integer = UInt(Zd::'00');

128-bit element
(FEAT_SME2)

Decode for this encoding

if !IsFeatureImplemented(FEAT_SME2) then EndOfDecode(Decode_UNDEF); end; if MaxImplementedSVL() < 512 then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 128; let n : integer = UInt(Zn::'00'); let d : integer = UInt(Zd::'00');