ADDS (immediate)

Add (immediate), setting flags, adds a register value and an optionally-shifted immediate value, and writes the result to the destination register. It updates the condition flags based on the result.

This instruction is used by the alias CMN (immediate).

313029282726252423222120191817161514131211109876543210
sf01100010shimm12RnRd
opS

32-bit (sf == 0)

ADDS <Wd>, <Wn|WSP>, #<imm>{, <shift>}

64-bit (sf == 1)

ADDS <Xd>, <Xn|SP>, #<imm>{, <shift>}

integer d = UInt(Rd); integer n = UInt(Rn); constant integer datasize = 32 << UInt(sf); bits(datasize) imm; case sh of when '0' imm = ZeroExtend(imm12, datasize); when '1' imm = ZeroExtend(imm12:Zeros(12), datasize);

Assembler Symbols

<Wd>

Is the 32-bit name of the general-purpose destination register, encoded in the "Rd" field.

<Wn|WSP>

Is the 32-bit name of the source general-purpose register or stack pointer, encoded in the "Rn" field.

<imm>

Is an unsigned immediate, in the range 0 to 4095, encoded in the "imm12" field.

<shift>

Is the optional left shift to apply to the immediate, defaulting to LSL #0 and encoded in sh:

sh <shift>
0 LSL #0
1 LSL #12
<Xd>

Is the 64-bit name of the general-purpose destination register, encoded in the "Rd" field.

<Xn|SP>

Is the 64-bit name of the source general-purpose register or stack pointer, encoded in the "Rn" field.

Alias Conditions

AliasIs preferred when
CMN (immediate)Rd == '11111'

Operation

bits(datasize) result; bits(datasize) operand1 = if n == 31 then SP[]<datasize-1:0> else X[n, datasize]; bits(4) nzcv; (result, nzcv) = AddWithCarry(operand1, imm, '0'); PSTATE.<N,Z,C,V> = nzcv; X[d, datasize] = result;

Operational information

If PSTATE.DIT is 1:


Internal version only: aarchmrs v2023-12_rel, pseudocode v2023-12_rel, sve v2023-12_rel ; Build timestamp: 2023-12-15T16:46

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