ADDSPL

Add multiple of Streaming SVE predicate register size to scalar register

Add the Streaming SVE predicate register size in bytes multiplied by an immediate in the range -32 to 31 to the 64-bit source general-purpose register or current stack pointer and place the result in the 64-bit destination general-purpose register or current stack pointer.

This instruction does not require the PE to be in Streaming SVE mode.

SME
(FEAT_SME)

313029282726252423222120191817161514131211109876543210
00000100011Rn01011imm6Rd

ADDSPL <Xd|SP>, <Xn|SP>, #<imm>

if !HaveSME() then UNDEFINED; integer n = UInt(Rn); integer d = UInt(Rd); integer imm = SInt(imm6);

Assembler Symbols

<Xd|SP>

Is the 64-bit name of the destination general-purpose register or stack pointer, encoded in the "Rd" field.

<Xn|SP>

Is the 64-bit name of the source general-purpose register or stack pointer, encoded in the "Rn" field.

<imm>

Is the signed immediate operand, in the range -32 to 31, encoded in the "imm6" field.

Operation

CheckSMEEnabled(); constant integer SVL = CurrentSVL; integer len = imm * (SVL DIV 64); bits(64) operand1 = if n == 31 then SP[] else X[n, 64]; bits(64) result = operand1 + len; if d == 31 then SP[] = result; else X[d, 64] = result;

Operational information

If PSTATE.DIT is 1:


Internal version only: aarchmrs v2023-12_rel, pseudocode v2023-12_rel, sve v2023-12_rel ; Build timestamp: 2023-12-15T16:46

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