AESD -- A64

integer d = UInt(Rd); integer n = UInt(Rn); if !IsFeatureImplemented(FEAT_AES) then UNDEFINED;

<Vd>	Is the name of the SIMD&FP source and destination register, encoded in the "Rd" field.

<Vn>	Is the name of the second SIMD&FP source register, encoded in the "Rn" field.

AArch64.CheckFPAdvSIMDEnabled(); bits(128) operand1 = V[d, 128]; bits(128) operand2 = V[n, 128]; bits(128) result; result = operand1 EOR operand2; result = AESInvSubBytes(AESInvShiftRows(result)); V[d, 128] = result;

If PSTATE.DIT is 1:

The execution time of this instruction is independent of:
- The values of the data supplied in any of its registers.
- The values of the NZCV flags.
The response of this instruction to asynchronous exceptions does not vary based on:
- The values of the data supplied in any of its registers.
- The values of the NZCV flags.

Internal version only: aarchmrs v2023-12_rel, pseudocode v2023-12_rel, sve v2023-12_rel ; Build timestamp: 2023-12-15T16:46

AESD