8-bit floating-point convert to BFloat16
Convert each even-numbered 8-bit floating-point element of the source vector to BFloat16 while downscaling the value, and place the results in the overlapping 16-bit elements of the destination vector. BF1CVT scales the values by 2-UInt(FPMR.LSCALE[5:0]). BF2CVT scales the values by 2-UInt(FPMR.LSCALE2[5:0]).
The 8-bit floating-point encoding format for BF1CVT is selected by FPMR.F8S1. The 8-bit floating-point encoding format for BF2CVT is selected by FPMR.F8S2.
This instruction is unpredicated.
It has encodings from 2 classes: BF1CVT and BF2CVT
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 0 | Zn | Zd | ||||||||
| L | |||||||||||||||||||||||||||||||
if (!HaveSVE2() && !HaveSME2()) || !IsFeatureImplemented(FEAT_FP8) then UNDEFINED; constant integer esize = 16; integer n = UInt(Zn); integer d = UInt(Zd); constant integer s_esize = 8; constant integer d_esize = 16; boolean issrc2 = FALSE;
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | Zn | Zd | ||||||||
| L | |||||||||||||||||||||||||||||||
if (!HaveSVE2() && !HaveSME2()) || !IsFeatureImplemented(FEAT_FP8) then UNDEFINED; constant integer esize = 16; integer n = UInt(Zn); integer d = UInt(Zd); constant integer s_esize = 8; constant integer d_esize = 16; boolean issrc2 = TRUE;
| <Zd> |
Is the name of the destination scalable vector register, encoded in the "Zd" field. |
| <Zn> |
Is the name of the source scalable vector register, encoded in the "Zn" field. |
CheckFPMREnabled(); CheckSVEEnabled(); constant integer VL = CurrentVL; constant integer elements = VL DIV esize; bits(VL) operand = Z[n, VL]; bits(VL) result; for e = 0 to elements-1 bits(esize) element = Elem[operand, e, esize]; bits(d_esize) res = FP8ConvertBF(element<s_esize-1:0>, issrc2, FPCR, FPMR); Elem[result, e, esize] = ZeroExtend(res, esize); Z[d, VL] = result;
Internal version only: aarchmrs v2023-12_rel, pseudocode v2023-12_rel, sve v2023-12_rel ; Build timestamp: 2023-12-15T16:46
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