BFMAXNM (multiple and single vector)

Multi-vector BFloat16 floating-point maximum number by vector

Determine the maximum number value of BFloat16 elements of the second source vector and the corresponding BFloat16 elements of the two or four first source vectors and destructively place the results in the corresponding elements of the two or four first source vectors.

Regardless of the value of FPCR.AH, the behavior is as follows:

This instruction follows SME2.1 non-widening BFloat16 numerical behaviors corresponding to instructions that place their results in two or four SVE Z vectors.

This instruction is unpredicated.

ID_AA64SMFR0_EL1.B16B16 indicates whether this instruction is implemented.

It has encodings from 2 classes: Two registers and Four registers

Two registers
(FEAT_SVE_B16B16)

313029282726252423222120191817161514131211109876543210
110000010010Zm10100001001Zdn0
size<1>size<0>

BFMAXNM { <Zdn1>.H-<Zdn2>.H }, { <Zdn1>.H-<Zdn2>.H }, <Zm>.H

if !HaveSME2() || !IsFeatureImplemented(FEAT_SVE_B16B16) then UNDEFINED; integer dn = UInt(Zdn:'0'); integer m = UInt('0':Zm); constant integer nreg = 2;

Four registers
(FEAT_SVE_B16B16)

313029282726252423222120191817161514131211109876543210
110000010010Zm10101001001Zdn00
size<1>size<0>

BFMAXNM { <Zdn1>.H-<Zdn4>.H }, { <Zdn1>.H-<Zdn4>.H }, <Zm>.H

if !HaveSME2() || !IsFeatureImplemented(FEAT_SVE_B16B16) then UNDEFINED; integer dn = UInt(Zdn:'00'); integer m = UInt('0':Zm); constant integer nreg = 4;

Assembler Symbols

<Zdn1>

For the two registers variant: is the name of the first scalable vector register of the destination and first source multi-vector group, encoded as "Zdn" times 2.

For the four registers variant: is the name of the first scalable vector register of the destination and first source multi-vector group, encoded as "Zdn" times 4.

<Zdn4>

Is the name of the fourth scalable vector register of the destination and first source multi-vector group, encoded as "Zdn" times 4 plus 3.

<Zdn2>

Is the name of the second scalable vector register of the destination and first source multi-vector group, encoded as "Zdn" times 2 plus 1.

<Zm>

Is the name of the second source scalable vector register Z0-Z15, encoded in the "Zm" field.

Operation

CheckStreamingSVEEnabled(); constant integer VL = CurrentVL; constant integer elements = VL DIV 16; array [0..3] of bits(VL) results; for r = 0 to nreg-1 bits(VL) operand1 = Z[dn+r, VL]; bits(VL) operand2 = Z[m, VL]; for e = 0 to elements-1 bits(16) element1 = Elem[operand1, e, 16]; bits(16) element2 = Elem[operand2, e, 16]; Elem[results[r], e, 16] = BFMaxNum(element1, element2, FPCR); for r = 0 to nreg-1 Z[dn+r, VL] = results[r];


Internal version only: aarchmrs v2023-12_rel, pseudocode v2023-12_rel, sve v2023-12_rel ; Build timestamp: 2023-12-15T16:46

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