Conditional Select Increment returns, in the destination register, the value of the first source register if the condition is TRUE, and otherwise returns the value of the second source register incremented by 1.
This instruction is used by the aliases CINC, and CSET.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
sf | 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | Rm | cond | 0 | 1 | Rn | Rd | |||||||||||||||
op | S | o2 |
integer d = UInt(Rd); integer n = UInt(Rn); integer m = UInt(Rm); constant integer datasize = 32 << UInt(sf);
<Wd> |
Is the 32-bit name of the general-purpose destination register, encoded in the "Rd" field. |
<Wn> |
Is the 32-bit name of the first general-purpose source register, encoded in the "Rn" field. |
<Wm> |
Is the 32-bit name of the second general-purpose source register, encoded in the "Rm" field. |
<Xd> |
Is the 64-bit name of the general-purpose destination register, encoded in the "Rd" field. |
<Xn> |
Is the 64-bit name of the first general-purpose source register, encoded in the "Rn" field. |
<Xm> |
Is the 64-bit name of the second general-purpose source register, encoded in the "Rm" field. |
Alias | Is preferred when |
---|---|
CINC | Rm != '11111' && Rn != '11111' && !(cond IN {'111x'}) && Rn == Rm |
CSET | Rm == '11111' && Rn == '11111' && !(cond IN {'111x'}) |
bits(datasize) result; if ConditionHolds(cond) then result = X[n, datasize]; else result = X[m, datasize]; result = result + 1; X[d, datasize] = result;
If PSTATE.DIT is 1:
Internal version only: aarchmrs v2023-12_rel, pseudocode v2023-12_rel, sve v2023-12_rel ; Build timestamp: 2023-12-15T16:46
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