Compare and terminate loop
Detect termination conditions in serialized vector loops. Tests whether the comparison between the scalar source operands holds true and if not tests the state of the !Last condition flag (C) which indicates whether the previous flag-setting predicate instruction selected the last element of the vector partition.
The Z and C condition flags are preserved by this instruction. The N and V condition flags are set as a pair to generate one of the following conditions for a subsequent conditional instruction:
| Condition | N | V | Meaning |
|---|---|---|---|
| GE | 0 | 0 | Continue loop (compare failed and last element not selected) |
| LT | 0 | 1 | Terminate loop (last element selected) |
| LT | 1 | 0 | Terminate loop (compare succeeded) |
| GE | 1 | 1 | Never generated |
The scalar source operands are 32-bit or 64-bit general-purpose registers of the same size.
It has encodings from 2 classes: Equal and Not equal
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | sz | 1 | Rm | 0 | 0 | 1 | 0 | 0 | 0 | Rn | 0 | 0 | 0 | 0 | 0 | ||||||||
| ne | |||||||||||||||||||||||||||||||
if !HaveSVE() && !HaveSME() then UNDEFINED; constant integer esize = 32 << UInt(sz); integer n = UInt(Rn); integer m = UInt(Rm); SVECmp op = Cmp_EQ;
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | sz | 1 | Rm | 0 | 0 | 1 | 0 | 0 | 0 | Rn | 1 | 0 | 0 | 0 | 0 | ||||||||
| ne | |||||||||||||||||||||||||||||||
if !HaveSVE() && !HaveSME() then UNDEFINED; constant integer esize = 32 << UInt(sz); integer n = UInt(Rn); integer m = UInt(Rm); SVECmp op = Cmp_NE;
| <R> |
Is a width specifier,
encoded in
|
| <n> |
Is the number [0-30] of the source general-purpose register or the name ZR (31), encoded in the "Rn" field. |
| <m> |
Is the number [0-30] of the source general-purpose register or the name ZR (31), encoded in the "Rm" field. |
CheckSVEEnabled(); bits(esize) operand1 = X[n, esize]; bits(esize) operand2 = X[m, esize]; integer element1 = UInt(operand1); integer element2 = UInt(operand2); boolean term; case op of when Cmp_EQ term = element1 == element2; when Cmp_NE term = element1 != element2; if term then PSTATE.N = '1'; PSTATE.V = '0'; else PSTATE.N = '0'; PSTATE.V = (NOT PSTATE.C);
If FEAT_SVE2 is implemented or FEAT_SME is implemented, then if PSTATE.DIT is 1:
Internal version only: aarchmrs v2023-12_rel, pseudocode v2023-12_rel, sve v2023-12_rel ; Build timestamp: 2023-12-15T16:46
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