Decrement vector by count of true predicate elements
Counts the number of true elements in the source predicate and then uses the result to decrement all destination vector elements.
The predicate size specifier may be omitted in assembler source code, but this is deprecated and will be prohibited in a future release of the architecture.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | size | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | Pm | Zdn | ||||||||
| D | |||||||||||||||||||||||||||||||
if !HaveSVE() && !HaveSME() then UNDEFINED; if size == '00' then UNDEFINED; constant integer esize = 8 << UInt(size); integer m = UInt(Pm); integer dn = UInt(Zdn);
| <Zdn> |
Is the name of the source and destination scalable vector register, encoded in the "Zdn" field. |
| <T> |
Is the size specifier,
encoded in
|
| <Pm> |
Is the name of the source scalable predicate register, encoded in the "Pm" field. |
CheckSVEEnabled(); constant integer VL = CurrentVL; constant integer PL = VL DIV 8; constant integer elements = VL DIV esize; bits(VL) operand1 = Z[dn, VL]; bits(PL) operand2 = P[m, PL]; bits(VL) result; integer count = 0; for e = 0 to elements-1 if ActivePredicateElement(operand2, e, esize) then count = count + 1; for e = 0 to elements-1 Elem[result, e, esize] = Elem[operand1, e, esize] - count; Z[dn, VL] = result;
This instruction might be immediately preceded in program order by a MOVPRFX instruction. The MOVPRFX instruction must conform to all of the following requirements, otherwise the behavior of the MOVPRFX and this instruction is unpredictable:
Internal version only: aarchmrs v2023-12_rel, pseudocode v2023-12_rel, sve v2023-12_rel ; Build timestamp: 2023-12-15T16:46
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