FCVTZS (scalar, fixed-point)

Floating-point Convert to Signed fixed-point, rounding toward Zero (scalar). This instruction converts the floating-point value in the SIMD&FP source register to a 32-bit or 64-bit fixed-point signed integer using the Round towards Zero rounding mode, and writes the result to the general-purpose destination register.

A floating-point exception can be generated by this instruction. Depending on the settings in FPCR, the exception results in either a flag being set in FPSR, or a synchronous exception being generated. For more information, see Floating-point exception traps.

Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the Security state and Exception level in which the instruction is executed, an attempt to execute the instruction might be trapped.

if ftype == '10' || (ftype == '11' && !IsFeatureImplemented(FEAT_FP16)) then UNDEFINED; integer d = UInt(Rd); integer n = UInt(Rn); constant integer intsize = 32 << UInt(sf); constant integer decode_fltsize = 8 << UInt(ftype EOR '10'); if sf == '0' && scale<5> == '0' then UNDEFINED; integer fracbits = 64 - UInt(scale);